Marc-Andre LaCroix

According to our database, Marc-Andre LaCroix authored at least 9 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

7.3 A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOS.

Dirk Pfaff, Muhammad Nummer, Noman Hai, Peter Xia, Kai Ge Yang, Mohammad-Mahdi Mohsenpour, Marc-Andre LaCroix, Babak Zamanlooy, Tom Eeckelaert, Dmitry Petrov, Mostafa Haroun, Carson Dick, Alif Zaman, Haitao Mei, Shahab Moazzeni, Tahseen Shakir, Carlos Carvalho, Howard Huang, Pratibha Kumari, Ralph Mason, Fahmida Brishty, Ifrah Jaffri

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022

A 112-Gb/s PAM-4 Low-Power Nine-Tap Sliding-Block DFE in a 7-nm FinFET Wireline Receiver.

James Bailey, Hossein Shakiba, Ehud Nir, Grigory Marderfeld, Peter Krotnev, Marc-Andre LaCroix, David Cassan, Davide Tonietto

IEEE J. Solid State Circuits, 2022

2021

8.4 A 116Gb/s DSP-Based Wireline Transceiver in 7nm CMOS Achieving 6pJ/b at 45dB Loss in PAM-4/Duo-PAM-4 and 52dB in PAM-2.

Marc-Andre LaCroix, Euhan Chong, Weilun Shen, Ehud Nir, Faisal Ahmed Musa, Haitao Mei, Mohammad-Mahdi Mohsenpour, Semyon Lebedev, Babak Zamanlooy, Carlos Carvalho, Qian Xin, Dmitry Petrov, Henry Wong, Huong Ho, Yang Xu, Sina Naderi Shahi, Peter Krotnev, Chris Feist, Howard Huang, Davide Tonietto

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A 112Gb/s PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver.

James Bailey, Hossein Shakiba, Ehud Nir, Grigory Marderfeld, Peter Krotnev, Marc-Andre LaCroix, David Cassan

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019

A 64-Gb/s 4-PAM Transceiver Utilizing an Adaptive Threshold ADC in 16-nm FinFET.

Luke Wang, Yingying Fu, Marc-Andre LaCroix, Euhan Chong, Anthony Chan Carusone

IEEE J. Solid State Circuits, 2019

A 60Gb/s PAM-4 ADC-DSP Transceiver in 7nm CMOS with SNR-Based Adaptive Power Scaling Achieving 6.9pJ/b at 32dB Loss.

Marc-Andre LaCroix, Henry Wong, Yun Hua Liu, Huong Ho, Semyon Lebedev, Petar Krotnev, Dorin Alexandru Nicolescu, Dmitry Petrov, Carlos Carvalho, Stephen Alie, Euhan Chong, Faisal Ahmed Musa, Davide Tonietto

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018

A 64Gb/s PAM-4 transceiver utilizing an adaptive threshold ADC in 16nm FinFET.

Luke Wang, Yingying Fu, Marc-Andre LaCroix, Euhan Chong, Anthony Chan Carusone

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

A 4-GS/s Single Channel Reconfigurable Folding Flash ADC for Wireline Applications in 16-nm FinFET.

Luke Wang, Marc-Andre LaCroix, Anthony Chan Carusone

IEEE Trans. Circuits Syst. II Express Briefs, 2017

2007

A low jitter clocking strategy for a 7.5-Gb/s SerDes array in 65nm CMOS technology.

Paul Madeira, Marc-Andre LaCroix, John Hogeboom

Proceedings of the 33rd European Solid-State Circuits Conference, 2007