Masakazu Suzuoki

According to our database, Masakazu Suzuoki authored at least 8 papers between 1999 and 2006.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2006

Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor.

Dac C. Pham, Tony Aipperspach, David Boerstler, Mark Bolliger, Rajat Chaudhry, Dennis Cox, Paul E. Harvey, H. Peter Hofstee, Charles R. Johns, Jim Kahle, Atsushi Kameyama, John M. Keaty, Yoshio Masubuchi, Mydung Pham, Jürgen Pille, Stephen D. Posluszny, Mack W. Riley, Daniel L. Stasiak, Masakazu Suzuoki, Osamu Takahashi, James D. Warnock, Stephen Weitzel, Dieter F. Wendel, Kazuaki Yazawa

IEEE J. Solid State Circuits, 2006

2005

The design methodology and implementation of a first-generation CELL processor: a multi-core SoC.

Dac C. Pham, Erwin Behnen, Mark Bolliger, H. Peter Hofstee, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Yoshio Masubuchi, Stephen D. Posluszny, Mack W. Riley, Masakazu Suzuoki, Michael Wang, James D. Warnock, Steve Weitzel, Dieter F. Wendel, Kazuaki Yazawa

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2001

CPU for PlayStation 2.

Haruyuki Tago, Kazuhiro Hashimoto, Nobuyuki Ikumi, Masato Nagamatsu, Masakazu Suzuoki, Yasuyuki Yamamoto

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Vector Unit Architecture for Emotion Synthesis.

Atsushi Kunimatsu, Nobuhiro Ide, Toshinori Sato, Yukio Endo, Hiroaki Murakami, Takayuki Kamei, Masashi Hirano, Fujio Ishihara, Haruyuki Tago, Masaaki Oka, Akio Ohba, Teiji Yutaka, Toyoshi Okada, Masakazu Suzuoki

IEEE Micro, 2000

2.44-GFLOPS 300-MHz floating-point vector-processing unit for high-performance 3D graphics computing.

Nobuhiro Ide, Masashi Hirano, Yukio Endo, Shin-ichi Yoshioka, Hiroaki Murakami, Atsushi Kunimatsu, Toshinori Sato, Takayuki Kamei, Toyoshi Okada, Masakazu Suzuoki

IEEE J. Solid State Circuits, 2000

Importance of CAD tools and methodology in high speed CPU design: invited talk.

Haruyuki Tago, Kazuhiro Hashimoto, Nobuyuki Ikumi, Masato Nagamatsu, Masakazu Suzuoki, Yasuyuki Yamamoto

Proceedings of ASP-DAC 2000, 2000

1999

Designing and programming the emotion engine.

Masaaki Oka, Masakazu Suzuoki

IEEE Micro, 1999

A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder.

Masakazu Suzuoki, Ken Kutaragi, Toshiyuki Hiroi, Hidetaka Magoshi, Shin'ichi Okamoto, Masaaki Oka, Akio Ohba, Yasuyuki Yamamoto, Makoto Furuhashi, Masayoshi Tanaka, Teiji Yutaka, Toyoshi Okada, Masato Nagamatsu, Yukihiro Urakawa, Masami Funyu, Atsushi Kunimatsu, Harutaka Goto, Kazuhiro Hashimoto, Nobuhiro Ide, Hiroaki Murakami, Yukio Ohtaguro, Akira Aono

IEEE J. Solid State Circuits, 1999