Takeshi Kodaka

According to our database1, Takeshi Kodaka authored at least 8 papers between 2005 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
A novel energy-efficient data acquisition method for wearable devices.
Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015

2014
Architecture and Evaluation of Low Power Many-Core SoC with Two 32-Core Clusters.
IEICE Trans. Electron., 2014

2013
Development of low power many-core SoC for multimedia applications.
Proceedings of the Design, Automation and Test in Europe, 2013

A near-future prediction method for low power consumption on a many-core processor.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
A low power many-core SoC with two 32-core clusters connected by tree based NoC for multimedia applications.
Proceedings of the Symposium on VLSI Circuits, 2012

2009
A Power, Performance Scalable Eight-Cores Media Processor for Mobile Multimedia Applications.
IEEE J. Solid State Circuits, 2009

Design and implementation of scalable, transparent threads for multi-core media processor.
Proceedings of the Design, Automation and Test in Europe, 2009

2005
Multigrain parallel processing on compiler cooperative chip multiprocessor.
Proceedings of the 9th Annual Workshop on Interaction between Compilers and Computer Architectures, 2005


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