Thierry Di Gilio

According to our database1, Thierry Di Gilio authored at least 4 papers between 2013 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
A 140 nW, 32.768 kHz, 1.9 ppm/°C Leakage-Based Digitally Relocked Clock Reference with 0.1 ppm Long-Term Stability in 28nm FD-SOI.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2016
Temperature-based adaptive memory sub-system in 28nm UTBB FDSOI.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2014
A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization.
IEEE J. Solid State Circuits, 2014

2013
Black box small-signal model of PMOS LDO voltage regulator.
Proceedings of the IECON 2013, 2013


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