Franck Arnaud

According to our database, Franck Arnaud authored at least 13 papers between 2011 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses.

Joao Henrique Quintino Palhares, Yann Beilliard, Jury Sandrini, Franck Arnaud, Kevin Garello, Guillaume Prenat, Lorena Anghel, Fabien Alibart, Dominique Drouin, Philippe Galy

CoRR, 2023

An 18nm ePCM with BJT selector NVM design for advanced microcontroller applications.

Antonino Conte, Francesco Tomaiuolo, Marco Ruta, Andrea Redaelli, Franck Arnaud, Thomas Jouanneau, Christian Boccaccio, Olivier Weber

Proceedings of the IEEE International Memory Workshop, 2023

2021

16MB High Density Embedded PCM macrocell for automotive-grade microcontroller in 28nm FD-SOI, featuring extension to 24MB for Over-The-Air software update.

Fabio Disegni, A. Ventre, A. Molgora, Paolo Cappelletti, R. Badalamenti, P. Ferreira, G. Castagna, Andreia Cathelin, Anna Gandolfo, Andrea Redaelli, D. Manfrè, Alfonso Maurelli, C. Torti, F. Piazza, M. Carfì, Franck Arnaud, M. Perroni, M. Caruso, S. Pezzini, Roberto Annunziata, G. Piazza, Olivier Weber, M. Peri

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

Improving Ge-rich GST ePCM reliability through BEOL engineering.

Andrea Redaelli, Anna Gandolfo, Giulia Samanni, Enrico Gomiero, Elisa Petroni, Luca Scotti, Andrea Lippiello, Paolo Mattavelli, J. Jasse, D. Codegoni, A. Serafini, Rossella Ranica, Christian Boccaccio, Jury Sandrini, R. Berthelon, J. C. Grenier, Olivier Weber, David Turgis, A. Valery, S. Del Medico, V. Caubet, J. P. Reynard, Didier Dutartre, L. Favennec, Antonino Conte, Fabio Disegni, M. De Tomasi, A. Ventre, Matteo Baldo, Daniele Ielmini, Alfonso Maurelli, P. Ferreira, Franck Arnaud, F. Piazza, Paolo Cappelletti, Roberto Annunziata, R. Gonella

Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

Artificial Intelligence: Why moving it to the Edge?

Joël Hartmann, Paolo Cappelletti, Nitin Chawla, Franck Arnaud, Andreia Cathelin

Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

2019

Embedded PCM macro for automotive-grade microcontroller in 28nm FD-SOI.

Fabio Disegni, Roberto Annunziata, A. Molgora, G. Campardo, Paolo Cappelletti, P. Zuliani, P. Ferreira, A. Ventre, G. Castagna, Andreia Cathelin, Anna Gandolfo, F. Goller, S. Malhi, D. Manfrè, Alfonso Maurelli, C. Torti, Franck Arnaud, M. Carfì, M. Perroni, M. Caruso, S. Pezzini, G. Piazza, Olivier Weber, M. Peri

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications.

Franck Arnaud, Sébastien Haendler, Sylvain Clerc, Rossella Ranica, Anna Gandolfo, Olivier Weber

Proceedings of the 49th European Solid-State Device Research Conference, 2019

2016

28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications.

Rossella Ranica, Nicolas Planes, Vincent Huard, Olivier Weber, Daniel Noblet, Damien Croain, Fabien Giner, Sylvie Naudet, P. Mergault, S. Ibars, A. Villaret, Maryline Parra, Sébastien Haendler, M. Quoirin, Florian Cacho, C. Julien, F. Terrier, Lorenzo Ciampolini, David Turgis, Christophe Lecocq, Franck Arnaud

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2014

A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization.

David Jacquet, Frederic Hasbani, Philippe Flatresse, Robin Wilson, Franck Arnaud, Giorgio Cesana, Thierry Di Gilio, Christophe Lecocq, Tanmoy Roy, Amit Chhabra, Chiranjeev Grover, Olivier Minez, Jacky Uginet, Guy Durieu, Cyril Adobati, Davide Casalotto, Frederic Nyer, Patrick Menut, Andreia Cathelin, Indavong Vongsavady, Philippe Magarshack

IEEE J. Solid State Circuits, 2014

Strain and layout management in dual channel (sSOI substrate, SiGe channel) planar FDSOI MOSFETs.

François Andrieu, Mikaël Cassé, E. Baylac, P. Perreau, O. Nier, Denis Rideau, R. Berthelon, Franck Pourchon, A. Pofelski, Barbara De Salvo, C. Gallon, Vincent Mazzocchi, D. Barge, C. Gaumer, O. Gourhant, A. Cros, V. Barral, Rossella Ranica, Nicolas Planes, Walter Schwarzenbach, E. Richard, Emmanuel Josse, Olivier Weber, Franck Arnaud, Maud Vinet, Olivier Faynot, M. Haond

Proceedings of the 44th European Solid State Device Research Conference, 2014

2013

Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology.

Philippe Flatresse, Bastien Giraud, Jean-Philippe Noel, Bertrand Pelloux-Prayer, Fabien Giner, Deepak-Kumar Arora, Franck Arnaud, Nicolas Planes, Julien Le Coz, Olivier Thomas, Sylvain Engels, Giorgio Cesana, Robin Wilson, Pascal Urard

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012

Impact of front-back gate coupling on low frequency noise in 28 nm FDSOI MOSFETs.

Christoforos G. Theodorou, Eleftherios G. Ioannidis, Sébastien Haendler, Nicolas Planes, Franck Arnaud, Jalal Jomaah, Charalambos A. Dimitriadis, Gérard Ghibaudo

Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2011

Challenges and opportunity in performance, variability and reliability in sub-45 nm CMOS technologies.

Franck Arnaud, L. Pinzelli, C. Gallon, M. Rafik, P. Mora, Frédéric Boeuf

Microelectron. Reliab., 2011