Tiansheng Zhang

Orcid: 0000-0002-8977-6117

According to our database1, Tiansheng Zhang authored at least 13 papers between 2013 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Study on Temperature Adjustable Terahertz Metamaterial Absorber Based on Vanadium Dioxide.
IEEE Access, 2020

X-Duplex Decode-and-Forward Relaying with Direct Link: A DPC-Based Transmission Scheme.
Proceedings of the 91st IEEE Vehicular Technology Conference, 2020

2018
MOCA: Memory Object Classification and Allocation in Heterogeneous Memory Systems.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium, 2018

Leveraging thermally-aware chiplet organization in 2.5D systems to reclaim dark silicon.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Resource and thermal management in 3D-stacked multi-/many-core systems
PhD thesis, 2017

Adaptive Tuning of Photonic Devices in a Photonic NoC Through Dynamic Workload Allocation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2016
Cross-layer floorplan optimization for silicon photonic NoCs in many-core systems.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Dynamic Cache Pooling in 3D Multicore Processors.
ACM J. Emerg. Technol. Comput. Syst., 2015

2014
Sharing and placement of on-chip laser sources in silicon-photonic NoCs.
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

An investigation of Unified Memory Access performance in CUDA.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014

Thermal management of manycore systems with silicon-photonic networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Dynamic cache pooling for improving energy efficiency in 3D stacked multicore processors.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

3D-MMC: a modular 3D multi-core architecture with efficient resource pooling.
Proceedings of the Design, Automation and Test in Europe, 2013


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