Aditya Narayan

According to our database, Aditya Narayan authored at least 9 papers between 2018 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Architecting Optically Controlled Phase Change Memory.

Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse K. Coskun, Ajay Joshi

ACM Trans. Archit. Code Optim., 2022

2021

Energy-efficient architectures for chip-scale networks and memory systems using silicon-photonics technology

Aditya Narayan

PhD thesis, 2021

PROWAVES: Proactive Runtime Wavelength Selection for Energy-Efficient Photonic NoCs.

Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse K. Coskun

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2020

Cross-Layer Co-Optimization of Network Design and Chiplet Placement in 2.5-D Systems.

Ayse K. Coskun, Furkan Eris, Ajay Joshi, Andrew B. Kahng, Yenai Ma, Aditya Narayan, Vaishnav Srinivas

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Bandwidth Allocation in Silicon-Photonic Networks Using Application Instrumentation.

Aditya Narayan, Ajay Joshi, Ayse K. Coskun

Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020

POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems.

Yvain Thonnart, Stéphane Bernabé, Jean Charbonnier, Christian Bernard, David Coriat, César Fuguet Tortolero, Pierre Tissier, Benoît Charbonnier, Stéphane Malhouitre, Damien Saint-Patrice, Myriam Assous, Aditya Narayan, Ayse K. Coskun, Denis Dutoit, Pascal Vivet

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications.

Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ajay Joshi, Ayse K. Coskun

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

WAVES: Wavelength Selection for Power-Efficient 2.5D-Integrated Photonic NoCs.

Aditya Narayan, Yvain Thonnart, Pascal Vivet, César Fuguet Tortolero, Ayse K. Coskun

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

MOCA: Memory Object Classification and Allocation in Heterogeneous Memory Systems.

Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy, Ayse K. Coskun

Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium, 2018