Tobias Koal

According to our database1, Tobias Koal authored at least 26 papers between 2008 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
A comprehensive software-based self-test and self-repair method for statically scheduled superscalar processors.
Proceedings of the 17th Latin-American Test Symposium, 2016

2015
A multi-layer software-based fault-tolerance approach for heterogenous multi-core systems.
Proceedings of the 16th Latin-American Test Symposium, 2015

Combining Correction of Delay Faults and Transient Faults.
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

Redundancy evaluation process of processor components for permanent fault compensation.
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015

2014
Effiziente Auswahl redundanter Komponenten für Prozessoren zur Kompensation permanenter Fehler.
PhD thesis, 2014

Timing for virtual TMR in logic circuits.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Systematic generation of diagnostic software-based self-test routines for processor components.
Proceedings of the 19th IEEE European Test Symposium, 2014

Reconfigurable high performance architectures: How much are they ready for safety-critical applications?
Proceedings of the 19th IEEE European Test Symposium, 2014

Diagnostic self-test for dynamically scheduled superscalar processors based on reconfiguration techniques for handling permanent faults.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

Combining fault tolerance and self repair at minimum cost in power and hardware.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013
Towards an automatic generation of diagnostic in-field SBST for processor components.
Proceedings of the 14th Latin American Test Workshop, 2013

Virtual TMR Schemes Combining Fault Tolerance and Self Repair.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

On performance estimation of a scalable VLIW soft-core in XILINX FPGAs.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

On the feasibility of combining on-line-test and self repair for logic circuits.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012
Activity Migration in M-of-N-Systems by Means of Load-Balancing.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

An adaptive self-test routine for in-field diagnosis of permanent faults in simple RISC cores.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

Combining on-line fault detection and logic self repair.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011
On the Feasibility of Built-In Self Repair for Logic Circuits.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

A new hierarchical built-in self-test with on-chip diagnosis for VLIW processors.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

Optimal spare utilization for reliability and mean lifetime improvement of logic built-in self-repair.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010
Combining de-stressing and self repair for long-term dependable systems.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

A software-based self-test and hardware reconfiguration solution for VLIW processors.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009
A Concept for Logic Self Repair.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

Reliability Estimation Process.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

A scheme of logic self repair including local interconnects.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008
Basic Architecture for Logic Self Repair.
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008


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