Vasilios I. Kelefouras

According to our database, Vasilios I. Kelefouras authored at least 41 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Practical Approach for Employing Tensor Train Decomposition in Edge Devices.

Milad Kokhazadeh, Georgios Keramidas, Vasilios I. Kelefouras, Iakovos Stamoulis

Int. J. Parallel Program., April, 2024

2023

Design and Implementation of Deep Learning 2D Convolutions on Modern CPUs.

Vasilios I. Kelefouras, Georgios Keramidas

IEEE Trans. Parallel Distributed Syst., December, 2023

Contactless Camera-Based Heart Rate and Respiratory Rate Monitoring Using AI on Hardware.

Dimitrios Kolosov, Vasilios I. Kelefouras, Pandelis Kourtessis, Iosif Mporas

Sensors, 2023

SDN-Based Routing Framework for Elephant and Mice Flows Using Unsupervised Machine Learning.

Muna Al-Saadi, Asiya Khan, Vasilios I. Kelefouras, David J. Walker, Bushra Al-Saadi

Network, 2023

Towards Highly Compressed CNN Models for Human Activity Recognition in Wearable Devices.

Dimitrios Gkountelos, Milad Kokhazadeh, Charalampos Bournas, Georgios Keramidas, Vasilios I. Kelefouras

Proceedings of the Signal Processing: Algorithms, 2023

A Comparative Study of Neural Network Compilers on ARMv8 Architecture.

Theologos Anthimopulos, Georgios Keramidas, Vasilios I. Kelefouras, Iakovos Stamoulis

Proceedings of the Architecture of Computing Systems - 36th International Conference, 2023

2022

Design and Implementation of 2D Convolution on x86/x64 Processors.

Vasilios I. Kelefouras, Georgios Keramidas

IEEE Trans. Parallel Distributed Syst., 2022

Workflow simulation and multi-threading aware task scheduling for heterogeneous computing.

Vasilios I. Kelefouras, Karim Djemame

J. Parallel Distributed Comput., 2022

A Methodology for Efficient Tile Size Selection for Affine Loop Kernels.

Vasilios I. Kelefouras, Karim Djemame, Georgios Keramidas, Nikolaos S. Voros

Int. J. Parallel Program., 2022

Anatomy of Deep Learning Image Classification and Object Detection on Commercial Edge Devices: A Case Study on Face Mask Detection.

Dimitrios Kolosov, Vasilios I. Kelefouras, Pandelis Kourtessis, Iosif Mporas

IEEE Access, 2022

XANDAR: A holistic Cybersecurity Engineering Process for Safety-critical and Cyber-physical Systems.

Fahad Siddiqui, Rafiullah Khan, Sakir Sezer, Kieran McLaughlin, Leonard Masing, Tobias Dörr, Florian Schade, Jürgen Becker, Alexander Ahlbrecht, Wanja Zaeske, Umut Durak, Nico Adler, Andreas Sailer, Raphael Weber, Thomas Wilhelm, Geza Nemeth, Victor Morales, Paco Gomez, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Vasilios I. Kelefouras, Konstantinos Antonopoulos, Nikolaos S. Voros, Christos Panagiotou, Dimitris Karadimas

Proceedings of the 95th IEEE Vehicular Technology Conference, 2022

A Design Space Exploration Methodology for Enabling Tensor Train Decomposition in Edge Devices.

Milad Kokhazadeh, Georgios Keramidas, Vasilios I. Kelefouras, Iakovos Stamoulis

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022

Safety by Construction: Pattern-Based Application of Safety Mechanisms in XANDAR.

Tobias Dörr, Florian Schade, Leonard Masing, Jürgen Becker, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Vasilios I. Kelefouras, Nikolaos S. Voros

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

XANDAR: Exploiting the X-by-Construction Paradigm in Model-based Development of Safety-critical Systems.

Leonard Masing, Tobias Dörr, Florian Schade, Jürgen Becker, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Efstratios Tiganourias, Vasilios I. Kelefouras, Konstantinos Antonopoulos, Nikos S. Voros, Umut Durak, Alexander Ahlbrecht, Wanja Zaeske, Christos Panagiotou, Dimitris Karadimas, Nico Adler, Andreas Sailer, Raphael Weber, Thomas Wilhelm, Geza Nemeth, Fahad Siddiqui, Rafiullah Khan, Vahid Garousi, Sakir Sezer, Victor Morales

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Evaluation of Language Runtimes in Open-source Serverless Platforms.

Karim Djemame, Daniel Datsev, Vasilios I. Kelefouras

Proceedings of the 12th International Conference on Cloud Computing and Services Science, 2022

2021

An Analytical Model for Loop Tiling Transformation.

Vasilios I. Kelefouras, Karim Djemame, Georgios Keramidas, Nikolaos S. Voros

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021

Unsupervised Machine Learning-Based Elephant and Mice Flow Identification.

Muna Al-Saadi, Asiya Khan, Vasilios I. Kelefouras, David J. Walker, Bushra Al-Saadi

Proceedings of the Intelligent Computing, 2021

A Hierarchical Profiler of Intermediate Representation Code based on LLVM.

Efstratios Tiganourias, Michail Mavropoulos, Georgios Keramidas, Vasilios I. Kelefouras, Christos P. Antonopoulos, Nikolaos S. Voros

Proceedings of the 10th Mediterranean Conference on Embedded Computing, 2021

XANDAR: X-by-Construction Design framework for Engineering Autonomous & Distributed Real-time Embedded Software Systems.

Jürgen Becker, Leonard Masing, Tobias Dörr, Florian Schade, Georgios Keramidas, Christos P. Antonopoulos, Michail Mavropoulos, Efstratios Tiganourias, Vasilios I. Kelefouras, Konstantinos Antonopoulos, Nikolaos S. Voros, Umut Durak, Alexander Ahlbrecht, Wanja Zaeske, Christos Panagiotou, Dimitris Karadimas, Nico Adler, Andreas Sailer, Raphael Weber, Thomas Wilhelm, Florian Oszwald, Dominik Reinhardt, Mohamad Chamas, Adnan Bekan, Graham Smethurst, Fahad Siddiqui, Rafiullah Khan, Vahid Garousi, Sakir Sezer, Victor Morales

Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

2019

A methodology correlating code optimizations with data memory accesses, execution time and energy consumption.

Vasilios I. Kelefouras, Karim Djemame

J. Supercomput., 2019

2018

Combining Software Cache Partitioning and Loop Tiling for Effective Shared Cache Management.

Vasilios I. Kelefouras, Georgios Keramidas, Nikos S. Voros

ACM Trans. Embed. Comput. Syst., 2018

Workflow Simulation Aware and Multi-threading Effective Task Scheduling for Heterogeneous Computing.

Vasilios I. Kelefouras, Karim Djemame

Proceedings of the 25th IEEE International Conference on High Performance Computing, 2018

A methodology for efficient code optimizations and memory management.

Vasilios I. Kelefouras, Karim Djemame

Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2017

A methodology pruning the search space of six compiler transformations by addressing them together as one problem and by exploiting the hardware architecture details.

Vasilios I. Kelefouras

Computing, 2017

Cache Partitioning + Loop Tiling: A Methodology for Effective Shared Cache Management.

Vasilios I. Kelefouras, Georgios Keramidas, Nikolaos S. Voros

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

2016

Array Size Computation under Uniform Overlapping and Irregular Accesses.

Angeliki Kritikakou, Francky Catthoor, Vasilios I. Kelefouras, Costas E. Goutis

ACM Trans. Design Autom. Electr. Syst., 2016

A high-performance matrix-matrix multiplication methodology for CPU and GPU architectures.

Vasilios I. Kelefouras, Angeliki Kritikakou, Iosif Mporas, Vasileios Kolonias

J. Supercomput., 2016

Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs.

Harris E. Michail, George Athanasiou, Vasilios I. Kelefouras, George Theodoridis, Thanos Stouraitis, Costas E. Goutis

J. Circuits Syst. Comput., 2016

2015

A methodology for speeding up matrix vector multiplication for single/multi-core architectures.

Vasilios I. Kelefouras, Angeliki Kritikakou, Elissavet Papadima, Constantinos E. Goutis

J. Supercomput., 2015

A methodology for speeding up loop kernels by exploiting the software information and the memory architecture.

Vasilios I. Kelefouras, Angeliki Kritikakou, Constantinos E. Goutis

Comput. Lang. Syst. Struct., 2015

2014

A Methodology for Speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices.

Vasilios I. Kelefouras, Angeliki Kritikakou, Konstantinos Siourounis, Costas E. Goutis

J. Signal Process. Syst., 2014

A Matrix-Matrix Multiplication methodology for single/multi-core architectures using SIMD.

Vasilios I. Kelefouras, Angeliki Kritikakou, Costas E. Goutis

J. Supercomput., 2014

A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization.

Vasilios I. Kelefouras, Angeliki Kritikakou, Costas E. Goutis

J. Supercomput., 2014

A scalable and near-optimal representation of access schemes for memory management.

Angeliki Kritikakou, Francky Catthoor, Vasilios I. Kelefouras, Costas E. Goutis

ACM Trans. Archit. Code Optim., 2014

2013

Near-optimal and scalable intrasignal in-place optimization for non-overlapping and irregular access schemes.

Angeliki Kritikakou, Francky Catthoor, Vasilios I. Kelefouras, Costas E. Goutis

ACM Trans. Design Autom. Electr. Syst., 2013

Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput Constraints.

Angeliki Kritikakou, Francky Catthoor, George Athanasiou, Vasilios I. Kelefouras, Costas E. Goutis

ACM Trans. Archit. Code Optim., 2013

A systematic approach to classify design-time global scheduling techniques.

Angeliki Kritikakou, Francky Catthoor, Vasilios I. Kelefouras, Costas E. Goutis

ACM Comput. Surv., 2013

2012

On the exploitation of a high-throughput SHA-256 FPGA design for HMAC.

Harris E. Michail, George Athanasiou, Vasilios I. Kelefouras, George Theodoridis, Costas E. Goutis

ACM Trans. Reconfigurable Technol. Syst., 2012

A data locality methodology for matrix-matrix multiplication algorithm.

Nikolaos Alachiotis, Vasilios I. Kelefouras, George Athanasiou, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis

J. Supercomput., 2012

A template-based methodology for efficient microprocessor and FPGA accelerator co-design.

Angeliki Kritikakou, Francky Catthoor, George Athanasiou, Vasilios I. Kelefouras, Costas E. Goutis

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

2011

A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization.

Vasilios I. Kelefouras, George Athanasiou, Nikolaos Alachiotis, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis

IEEE Trans. Signal Process., 2011