Victor Lee

Orcid: 0009-0009-1608-1232

According to our database1, Victor Lee authored at least 17 papers between 1993 and 2025.

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Bibliography

2025
Concorde: Fast and Accurate CPU Performance Modeling with Compositional Analytical-ML Fusion.
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025

2023
Alternately Optimized Graph Neural Networks.
Proceedings of the International Conference on Machine Learning, 2023

2022
Alternately Optimized Graph Neural Networks.
CoRR, 2022

2020
Distributed Scheduling for Time-Critical Tasks in a Two-layer Vehicular Fog Computing Architecture.
Proceedings of the IEEE 17th Annual Consumer Communications & Networking Conference, 2020

2019
Predicting New Workload or CPU Performance by Analyzing Public Datasets.
ACM Trans. Archit. Code Optim., 2019

Enabling Safety-Critical and Computation-Intensive IoV Applications via Vehicular Fog Computing.
Proceedings of the 15th International Conference on Mobile Ad-Hoc and Sensor Networks, 2019

2017
The Trinity Center of Excellence Co-Design Best Practices.
Comput. Sci. Eng., 2017

2015
LFRTrainer: Large-Scale Face Recognition Training System.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

2012
Component commonality in closed-loop manufacturing systems.
J. Intell. Manuf., 2012

2009
Component Commonality in Closed-Loop Supply Chain.
Proceedings of the 6th CIRP-Sponsored International Conference on Digital Enterprise Technology, 2009

2003
Generic provisioning of heterogeneous services--a close encounter with service profiles.
Comput. Networks, 2003

2002
CMOS Differential and Absolute Thermal Sensors.
J. Electron. Test., 2002

1998
Exploiting Two-Case Delivery for Fast Protected Messaging.
Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, Las Vegas, Nevada, USA, January 31, 1998

1997
Baring It All to Software: Raw Machines.
Computer, 1997

Implications of I/O for Gang Scheduled Workloads.
Proceedings of the Job Scheduling Strategies for Parallel Processing, 1997

The RAW benchmark suite: computation structures for general purpose computing.
Proceedings of the 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 1997

1993
A 500-megabyte/s data-rate 4.5 M DRAM.
IEEE J. Solid State Circuits, April, 1993


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