Anant Agarwal

Affiliations:
  • MIT, Cambridge, USA


According to our database1, Anant Agarwal authored at least 117 papers between 1982 and 2022.

Collaborative distances:

Awards

ACM Fellow

ACM Fellow 2007, "For contributions to parallel and reconfigurable computing.".

IEEE Fellow

IEEE Fellow 2012, "For contributions to silicon carbide power device technology".

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2022
Static Performance and Reliability of 4H-SiC Diodes with P+ Regions Formed by Various Profiles and Temperatures.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

An Extended SSD-Based Cache for Efficient Object Store Access in SAP IQ.
Proceedings of the 38th IEEE International Conference on Data Engineering, 2022

2021
Widening Access to Applied Machine Learning with TinyML.
CoRR, 2021

2020
Non-Isothermal Simulations to Optimize SiC MOSFETs for Enhanced Short-Circuit Ruggedness.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Self-attention based BiLSTM-CNN classifier for the prediction of ischemic and non-ischemic cardiomyopathy.
CoRR, 2019

2016
Wide Bandgap power devices and applications; the U.S. initiative.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2014
Assessment in Digital At-scale Learning Environments: MOOCs and technology to advance learning and learning research (Ubiquity symposium).
Ubiquity, 2014

2013
Power Optimization in Embedded Systems via Feedback Control of Resource Allocation.
IEEE Trans. Control. Syst. Technol., 2013

Teaching electronic circuits online: Lessons from MITx's 6.002x on edX.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Sign language recognition using Microsoft Kinect.
Proceedings of the Sixth International Conference on Contemporary Computing, 2013

A generalized software framework for accurate and efficient management of performance goals.
Proceedings of the International Conference on Embedded Software, 2013

TypeRighting: combining the benefits of handwriting and typeface in online educational videos.
Proceedings of the 2013 ACM SIGCHI Conference on Human Factors in Computing Systems, 2013

2012
Selecting Spatiotemporal Patterns for Development of Parallel Applications.
IEEE Trans. Parallel Distributed Syst., 2012

Comparison of Decision-Making Strategies for Self-Optimization in Autonomic Computing Systems.
ACM Trans. Auton. Adapt. Syst., 2012

DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012

Configurable fine-grain protection for multicore processor virtualization.
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012

Cross-layer Energy and Performance Evaluation of a Nanophotonic Manycore Processor System Using Real Application Workloads.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

The case for elastic operating system services in fos.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Self-aware computing in the Angstrom processor.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
ARCc: A case for an architecturally redundant cache-coherence architecture for large multicores.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011

Decision making in autonomic computing systems: comparison of approaches and techniques.
Proceedings of the 8th International Conference on Autonomic Computing, 2011

Smart data structures: an online machine learning approach to multicore data structures.
Proceedings of the 8th International Conference on Autonomic Computing, 2011

Multicore Performance Optimization Using Partner Cores.
Proceedings of the 3rd USENIX Workshop on Hot Topics in Parallelism, 2011

Dynamic knobs for responsive power-aware computing.
Proceedings of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems, 2011

2010
Application heartbeats for software performance and health.
Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2010

ATAC: Improving performance and programmability with on-chip optical networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Application heartbeats: a generic interface for specifying program performance and goals in autonomous computing environments.
Proceedings of the 7th International Conference on Autonomic Computing, 2010

Smartlocks: lock acquisition scheduling for self-aware synchronization.
Proceedings of the 7th International Conference on Autonomic Computing, 2010

Graphite: A distributed parallel simulator for multicores.
Proceedings of the 16th International Conference on High-Performance Computer Architecture (HPCA-16 2010), 2010

Remote Store Programming.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010

An operating system for multicore and clouds: mechanisms and implementation.
Proceedings of the 1st ACM Symposium on Cloud Computing, 2010

Controlling software applications via resource allocation within the heartbeats framework.
Proceedings of the 49th IEEE Conference on Decision and Control, 2010

Enabling technologies for self-aware adaptive systems.
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010

ATAC: a 1000-core cache-coherent processor with on-chip optical network.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009

Factored operating systems (fos): the case for a scalable operating system for multicores.
ACM SIGOPS Oper. Syst. Rev., 2009

Physical phenomena affecting performance and reliability of 4H-SiC bipolar junction transistors.
Microelectron. Reliab., 2009

Software Standards for the Multicore Era.
IEEE Micro, 2009

Keynote 3 (Banquet Talk) Digital space.
Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Keynote: The Other Face of On-Chip Interconnect.
Proceedings of the 17th IEEE Symposium on High Performance Interconnects, 2009

2008
Effect of crystallographic defects on the reverse performance of 4H-SiC JBS diodes.
Microelectron. Reliab., 2008

Thousand-Core Chips [Roundtable].
IEEE Des. Test Comput., 2008

10 kV SiC MOSFET Based Boost Converter.
Proceedings of the Industry Applications Society Annual Meeting, 2008

rMPI: Message Passing on Multicore Processors with On-Chip Interconnect.
Proceedings of the High Performance Embedded Architectures and Compilers, 2008

2007
On-Chip Interconnection Architecture of the Tile Processor.
IEEE Micro, 2007

Comparisons of SiC MOSFET and Si IGBT Based Motor Drive Systems.
Proceedings of the Conference Record of the 2007 IEEE Industry Applications Conference Forty-Second IAS Annual Meeting, 2007

The KILL Rule for Multicore.
Proceedings of the 44th Design Automation Conference, 2007

2006
Constructing Virtual Architectures on a Tiled Processor.
Proceedings of the Fourth IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2006), 2006

Software-based instruction caching for embedded processors.
Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, 2006

2005
Scalar Operand Networks.
IEEE Trans. Parallel Distributed Syst., 2005

TraceBack: first fault diagnosis by reconstruction of distributed control flow.
Proceedings of the ACM SIGPLAN 2005 Conference on Programming Language Design and Implementation, 2005

Gigabit routing on a software-exposed tiled-microprocessor.
Proceedings of the 2005 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2005

2004
Stream Algorithms and Architecture.
J. Instr. Level Parallelism, 2004

Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams.
Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

A Quantitative Comparison of Reconfigurable, Tiled, and Conventional Architectures on Bit-Level Computation.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

2003
Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture.
Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003

2002
SiC power-switching devices-the second electronics revolution?
Proc. IEEE, 2002

The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs.
IEEE Micro, 2002

2001
SimpleFit: A Framework for Analyzing Design Trade-Offs in Raw Architectures.
IEEE Trans. Parallel Distributed Syst., 2001

Compiler Support for Scalable and Efficient Memory Systems.
IEEE Trans. Computers, 2001

Optimal Tiling for Minimizing Communication in Distributed Shared-Memory Multiprocessors.
Proceedings of the Compiler Optimizations for Scalable Parallel Systems Languages, 2001

2000
Multigrain shared memory.
ACM Trans. Comput. Syst., 2000

1999
Shared Memory Versus Message Passing for Iterative Solution of Sparse Irregular Problems.
Parallel Process. Lett., 1999

The MIT Alewife Machine.
Proc. IEEE, 1999

Maps: A Compiler-Managed Memory System for Raw Machines.
Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

1998
The MIT Alewife Machine: Architecture and Performance.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Retrospective: The MIT Alewife Machine: Architecture and Performance.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Exploiting Two-Case Delivery for Fast Protected Messaging.
Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, Las Vegas, Nevada, USA, January 31, 1998

The Sensitivity of Communication Mechanisms to Bandwidth and Latency.
Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, Las Vegas, Nevada, USA, January 31, 1998

Memory bank disambiguation using modulo unrolling for Raw machines.
Proceedings of the 5th International Conference On High Performance Computing, 1998

Exploring Optimal Cost-Performance Designs for Raw Microprocessors.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997
Logic emulation with virtual wires.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Baring It All to Software: Raw Machines.
Computer, 1997

LoPC: Modeling Contention in Parallel Algorithms.
Proceedings of the Sixth ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), 1997

The RAW benchmark suite: computation structures for general purpose computing.
Proceedings of the 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 1997

1996
Application Performance on the MIT Alewife Machine.
Computer, 1996

Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed-Memory Multiprocessors.
Proceedings of the Languages and Compilers for Parallel Computing, 1996

MGS: A Multigrain Shared Memory System.
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

1995
Automatic Partitioning of Parallel Loops and Data Arrays for Distributed Shared-Memory Multiprocessors.
IEEE Trans. Parallel Distributed Syst., 1995

The MIT Alewife Machine: Architecture and Performance.
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

TIERS: Topology Independent Pipelined Routing and Scheduling for VirtualWire Compilation.
Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays, 1995

1994
Hierarchical Compilation of Macro Dataflow Graphs for Multiprocessors with Local Memory.
IEEE Trans. Parallel Distributed Syst., 1994

Architectural and implementation issues for multithreading (panel session I).
SIGARCH Comput. Archit. News, 1994

Memory Assignment for Multiprocessor Caches through Grey Coloring.
Proceedings of the PARLE '94: Parallel Architectures and Languages Europe, 1994

Software-Extended Coherent Shared Memory: Performance and Cost.
Proceedings of the 21st Annual International Symposium on Computer Architecture. Chicago, 1994

Performance of Switch Blocking on Multithreaded Architectures.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

Reactive Synchronization Algorithms for Multiprocessors.
Proceedings of the ASPLOS-VI Proceedings, 1994

Low-Cost Support for Fine-Grain Synchronization in Multiprocessors.
Proceedings of the Multithreaded Computer Architecture, 1994

1993
Waiting Algorithms for Synchronization in Large-Scale Multiprocessors.
ACM Trans. Comput. Syst., 1993

Sparcle: an evolutionary processor design for large-scale multiprocessors.
IEEE Micro, 1993

Analyzing Multiprocessor Cache Behavior Through Data Reference Modeling.
Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1993

Experience with Fine-Grain Synchronization in MIMD Machines for Preconditioned Conjugate Gradient.
Proceedings of the Fourth ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), 1993

Column-Associative Caches: A Technique for Reducing the Miss Rate of Direct-Mapped Caches.
Proceedings of the 20th Annual International Symposium on Computer Architecture, 1993

Anatomy of a Message in the Alewife Multiprocessor.
Proceedings of the 7th international conference on Supercomputing, 1993

Automatic Partitioning of Parallel Loops for Cache-Coherent Multiprocessors.
Proceedings of the 1993 International Conference on Parallel Processing, 1993

1992
Performance Tradeoffs in Multithreaded Processors.
IEEE Trans. Parallel Distributed Syst., 1992

Integrating Message-Passing and Shared-Memory: Early Experience.
Proceedings of the 2nd SIGPLAN Workshop on Languages, Compilers, and Run-Time Environments for Distributed Memory Multiprocessors, Boulder, Colorado, September 30, 1992

Sparcle: A Multithreaded VLSI Processor for Parallel Computing.
Proceedings of the Parallel Symbolic Computing: Languages, 1992

Compile-time Techniques for Processor Allocation in Macro Dataflow Graphs for Multiprocessors.
Proceedings of the 1992 International Conference on Parallel Processing, 1992

Closing the Window of Vulnerability in Multiphase Memory Transactions.
Proceedings of the ASPLOS-V Proceedings, 1992

1991
Limits on Interconnection Network Performance.
IEEE Trans. Parallel Distributed Syst., 1991

Scalability of Parallel Machines.
Commun. ACM, 1991

LimitLESS Directories: A Scalable Cache Coherence Scheme.
Proceedings of the ASPLOS-IV Proceedings, 1991

1990
Directory-Based cache Coherence in Large-Scale Multiprocessors.
Computer, 1990

Modeling a Circuit Switched Multiprocessor Interconnect.
Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1990

Blocking: Exploiting Spatial Locality for Trace Compaction.
Proceedings of the 1990 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1990

APRIL: A Processor Architecture for Multiprocessing.
Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990

1989
An Analytical Cache Model.
ACM Trans. Comput. Syst., 1989

Adaptive Backoff Synchronization Techniques.
Proceedings of the 16th Annual International Symposium on Computer Architecture. Jerusalem, 1989

Evaluating the Performance of Software Cache Coherence.
Proceedings of the ASPLOS-III Proceedings, 1989

Analysis of cache performance for operating systems and multiprogramming.
The Kluwer international series in engineering and computer science 69, Kluwer, ISBN: 978-0-7923-9005-3, 1989

1988
Cache Performance of Operating System and Multiprogramming Workloads.
ACM Trans. Comput. Syst., 1988

Memory-Reference Characteristics of Multiprocessor Applications under MACH.
Proceedings of the 1988 ACM SIGMETRICS conference on Measurement and modeling of computer systems, 1988

Multiprocessor Cache Analysis Using ATUM.
Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988

An Evaluation of Directory Schemes for Cache Coherence.
Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988

1986
ATUM: A New Technique for Capturing Address Traces Using Microcode.
Proceedings of the 13th Annual Symposium on Computer Architecture, Tokyo, Japan, June 1986, 1986

1982
A modification over Sakoe and Chiba's dynamic time warping algorithm for isolated word recognition.
Proceedings of the IEEE International Conference on Acoustics, 1982


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