Victor W. Lee

According to our database1, Victor W. Lee authored at least 34 papers between 2003 and 2019.

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Bibliography

2019
Implications of a metric for performance portability.
Future Gener. Comput. Syst., 2019

Towards Unsupervised Segmentation of Extreme Weather Events.
CoRR, 2019

DisCo: Physics-Based Unsupervised Discovery of Coherent Structures in Spatiotemporal Systems.
Proceedings of the 2019 IEEE/ACM Workshop on Machine Learning in High Performance Computing Environments, 2019

Etalumis: bringing probabilistic programming to scientific simulators at scale.
Proceedings of the International Conference for High Performance Computing, 2019

Efficient Probabilistic Inference in the Quest for Physics Beyond the Standard Model.
Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019

2018
CosmoFlow: using deep learning to learn the universe at scale.
Proceedings of the International Conference for High Performance Computing, 2018

2017
Modeling the Power Variability of Core Speed Scaling on Homogeneous Multicore Systems.
Sci. Program., 2017

Scaling GRPC Tensorflow on 512 nodes of Cori Supercomputer.
CoRR, 2017

Mozart : Efficient Composition of Library Functions for Heterogeneous Execution.
Proceedings of the Languages and Compilers for Parallel Computing, 2017

Voltage Regulator Efficiency Aware Power Management.
Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

2016
Full-Stack Architecting to Achieve a Billion-Requests-Per-Second Throughput on a Single Key-Value Store Server Platform.
ACM Trans. Comput. Syst., 2016

Achieving One Billion Key-Value Requests per Second on a Single Server.
IEEE Micro, 2016

A Metric for Performance Portability.
CoRR, 2016

2015
Architecting to achieve a billion requests per second throughput on a single key-value store server platform.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

2014
Improving the energy efficiency of Big Cores.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

2013
Lattice QCD on Intel® Xeon PhiTM Coprocessors.
Proceedings of the Supercomputing - 28th International Supercomputing Conference, 2013

2012
Extending the BT NAS parallel benchmark to exascale computing.
Proceedings of the SC Conference on High Performance Computing Networking, 2012

Miss-Correlation Folding: Encoding Per-Block Miss Correlations in Compressed DRAM for Data Prefetching.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

Performance Benefits of Heterogeneous Computing in HPC Workloads.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2011
Designing fast architecture-sensitive tree search on modern multicore/many-core processors.
ACM Trans. Database Syst., 2011

Designing and dynamically load balancing hybrid LU for multi/many-core.
Comput. Sci. Res. Dev., 2011

Emerging applications for multi/many-core processors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Image Processing on Multicore x86 Architectures.
IEEE Signal Process. Mag., 2010

Fast sort on CPUs and GPUs: a case for bandwidth oblivious SIMD sort.
Proceedings of the ACM SIGMOD International Conference on Management of Data, 2010

FAST: fast architecture sensitive tree search on modern CPUs and GPUs.
Proceedings of the ACM SIGMOD International Conference on Management of Data, 2010

Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

2009
Mapping High-Fidelity Volume Rendering for Medical Imaging to CPU, GPU and Many-Core Architectures.
IEEE Trans. Vis. Comput. Graph., 2009

Sort vs. Hash Revisited: Fast Join Implementation on Modern Multi-Core CPUs.
Proc. VLDB Endow., 2009

2008
Efficient implementation of sorting on multi-core SIMD CPU architecture.
Proc. VLDB Endow., 2008

Convergence of Recognition, Mining, and Synthesis Workloads and Its Implications.
Proceedings of the IEEE, 2008

Atomic Vector Operations on Chip Multiprocessors.
Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

2007
Scaling performance of interior-point method on large-scale chip multiprocessor system.
Proceedings of the ACM/IEEE Conference on High Performance Networking and Computing, 2007

2006
Coterminous locality and coterminous group data prefetching on chip-multiprocessors.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2003
Experience with Applying Formal Methods to Protocol Specification and System Architecture.
Formal Methods Syst. Des., 2003


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