Wataru Takahashi

Orcid: 0000-0002-0958-030X

Affiliations:
  • NEC Corporation, Kawasaki, Japan


According to our database1, Wataru Takahashi authored at least 7 papers between 2003 and 2025.

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Timeline

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Bibliography

2025
A High Level Synthesis Tool for Multiple FPGAs.
Proceedings of the 18th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2025

2023
Time for aCTIon: Automated Analysis of Cyber Threat Intelligence in the Wild.
CoRR, 2023

2021
A programming environment for multi-FPGA systems based on CyberWorkBench: an integrated design tool.
Proceedings of the HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2021

2018
Via-Switch FPGA: Highly Dense Mixed-Grained Reconfigurable Architecture With Overlay Via-Switch Crossbars.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2016
Range Limiter Using Connection Bounding Box for SA-Based Placement of Mixed-Grained Reconfigurable Architecture.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016

2010
Fixed Point Data Type Modeling for High Level Synthesis.
IEICE Trans. Electron., 2010

2003
Study and Analysis of System LSI Design Methodologies Using C-Based Behavioral Synthesis.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003


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