Xiaowei Ren

According to our database, Xiaowei Ren authored at least 13 papers between 2014 and 2021.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2021

CHOPIN: Scalable Graphics Rendering in Multi-GPU Systems via Parallel Image Composition.

Xiaowei Ren, Mieszko Lis

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

Dynamic Partial Order Reductions for Spinloops.

Michalis Kokologiannakis, Xiaowei Ren, Viktor Vafeiadis

Proceedings of the Formal Methods in Computer Aided Design, 2021

2020

Procrustes: a Dataflow and Accelerator for Sparse Deep Neural Network Training.

Dingqing Yang, Amin Ghasemazar, Xiaowei Ren, Maximilian Golub, Guy Lemieux, Mieszko Lis

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems.

Xiaowei Ren, Daniel Lustig, Evgeny Bolotin, Aamer Jaleel, Oreste Villa, David W. Nellans

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2018

High-Performance GPU Transactional Memory via Eager Conflict Detection.

Xiaowei Ren, Mieszko Lis

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017

Efficient Sequential Consistency in GPUs via Relativistic Cache Coherence.

Xiaowei Ren, Mieszko Lis

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016

A Deadlock-Free and Connectivity-Guaranteed Methodology for Achieving Fault-Tolerance in On-Chip Networks.

Pengju Ren, Xiaowei Ren, Sudhanshu Sane, Michel A. Kinsy, Nanning Zheng

IEEE Trans. Computers, 2016

2015

A reconfigurable parallel FPGA accelerator for the kernel affine projection algorithm.

Xiaowei Ren, Qihang Yu, Badong Chen, Nanning Zheng, Pengju Ren

Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

A real-time permutation entropy computation for EEG signals.

Xiaowei Ren, Qihang Yu, Badong Chen, Nanning Zheng, Pengju Ren

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

A 128-way FPGA platform for the acceleration of KLMS algorithm.

Xiaowei Ren, Qihang Yu, Badong Chen, Nanning Zheng, Pengju Ren

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

Hardware implementation of KLMS algorithm using FPGA.

Xiaowei Ren, Pengju Ren, Badong Chen, Tai Min, Nanning Zheng

Proceedings of the 2014 International Joint Conference on Neural Networks, 2014

A reconfigurable parallel acceleration platform for evaluation of permutation entropy.

Xiaowei Ren, Pengju Ren, Badong Chen, José C. Príncipe, Nanning Zheng

Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

Fault-tolerant Routing for On-chip Network Without Using Virtual Channels.

Pengju Ren, Qingxin Meng, Xiaowei Ren, Nanning Zheng

Proceedings of the 51st Annual Design Automation Conference 2014, 2014