Seungcheol Baek

Orcid: 0009-0007-1624-4586

According to our database1, Seungcheol Baek authored at least 10 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023
Enhancing Computation Efficiency in Large Language Models through Weight and Activation Quantization.
Proceedings of the 2023 Conference on Empirical Methods in Natural Language Processing, 2023

2017
HoPE: Hot-Cacheline Prediction for Dynamic Early Decompression in Compressed LLCs.
ACM Trans. Design Autom. Electr. Syst., 2017

2015
Size-Aware Cache Management for Compressed Cache Architectures.
IEEE Trans. Computers, 2015

2014
High-performance memory system architectures using data compression.
PhD thesis, 2014

Designing Hybrid DRAM/PCM Main Memory Systems Utilizing Dual-Phase Compression.
ACM Trans. Design Autom. Electr. Syst., 2014

2013
ECM: Effective Capacity Maximizer for high-performance compressed caching.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

2012
A Compression-Based Hybrid MLC/SLC Management Technique for Phase-Change Memory Systems.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

A dual-phase compression mechanism for hybrid DRAM/PCM main memory architectures.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

2011
An energy- and performance-aware DRAM cache architecture for hybrid DRAM/PCM main memory systems.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011


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