Xuefan Jin
Orcid: 0000-0002-2784-4196
According to our database1,
Xuefan Jin
authored at least 11 papers
between 2012 and 2022.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2022
IEEE J. Solid State Circuits, 2022
2021
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
A 4-GHz Sub-Harmonically Injection-Locked Phase-Locked Loop With Self-Calibrated Injection Timing and Pulsewidth.
IEEE J. Solid State Circuits, 2020
2019
A 4-GHz Sub-harmonically Injection-Locked Phase-Locked Loop with Self-Calibrated Injection Timing and Pulsewidth.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
2018
A 12.5-Gb/s Near-Ground Transceiver Employing a MaxEye Algorithm-Based Adaptation Technique.
IEEE Trans. Very Large Scale Integr. Syst., 2018
A 0.75-3.0-Gb/s Dual-Mode Temperature-Tolerant Referenceless CDR With a Deadzone-Compensated Frequency Detector.
IEEE J. Solid State Circuits, 2018
IEEE Access, 2018
2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2015
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015
2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2012
A 3.0 Gb/s clock data recovery circuits based on digital DLL for clock-embedded display interface.
Proceedings of the 38th European Solid-State Circuit conference, 2012