Sang Lyul Min
According to our database1,
Sang Lyul Min
authored at least 100 papers
between 1989 and 2021.
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Bibliography
2021
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
2019
Proceedings of the 17th USENIX Conference on File and Storage Technologies, 2019
2018
HIL: A Framework for Compositional FTL Development and Provably-Correct Crash Recovery.
ACM Trans. Storage, 2018
Proceedings of the 2018 USENIX Annual Technical Conference, 2018
FMMU: a hardware-accelerated flash map management unit for scalable performance of flash-based SSDs.
Proceedings of the 55th Annual Design Automation Conference, 2018
Proceedings of the 9th Asia-Pacific Workshop on Systems, 2018
2017
ACM Trans. Embed. Comput. Syst., 2017
FMMU: A Hardware-Automated Flash Map Management Unit for Scalable Performance of NAND Flash-Based SSDs.
CoRR, 2017
Proceedings of the 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, 2017
Proceedings of the IEEE 6th Non-Volatile Memory Systems and Applications Symposium, 2017
2016
2014
2012
2011
ACM Trans. Embed. Comput. Syst., 2011
IEEE Trans. Computers, 2011
Proceedings of the 14th International Conference on Compilers, 2011
2010
IEEE Trans. Computers, 2010
IEEE Trans. Computers, 2010
2009
J. Inf. Sci. Eng., 2009
J. Comput. Sci. Eng., 2009
2008
A design framework for real-time embedded systems with code size and energy constraints.
ACM Trans. Embed. Comput. Syst., 2008
ACM Trans. Embed. Comput. Syst., 2008
IEEE Comput. Archit. Lett., 2008
Proceedings of the IEEE International Conference on Systems, 2008
Proceedings of the 11th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2008), 2008
LTFTL: lightweight time-shift flash translation layer for flash memory based embedded storage.
Proceedings of the 8th ACM & IEEE International conference on Embedded software, 2008
2007
Proceedings of the Handbook of Real-Time and Embedded Systems., 2007
ACM Trans. Embed. Comput. Syst., 2007
Design, Implementation, and Performance Evaluation of Flash Memory-based File System on Chip.
J. Inf. Sci. Eng., 2007
Proceedings of the IEEE International Conference on Systems, 2007
Virtual framework for testing the reliability of system software on embedded systems.
Proceedings of the 2007 ACM Symposium on Applied Computing (SAC), 2007
Proceedings of the Advances in Computer Systems Architecture, 2007
2006
A dynamic code placement technique for scratchpad memory using postpass optimization.
Proceedings of the 2006 International Conference on Compilers, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
An Exact Stochastic Analysis of Priority-Driven Periodic Real-Time Systems and Its Approximations.
IEEE Trans. Computers, 2005
Performance Evaluation of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems.
J. Low Power Electron., 2005
2004
A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor.
Proceedings of the Software and Compilers for Embedded Systems, 8th International Workshop, 2004
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Proceedings of the EMSOFT 2004, 2004
2003
An accurate and practical buffer allocation model for the buffer cache based on marginal gains.
Inf. Process. Lett., 2003
A Flexible Tradeoff between Code Size and WCET Employing Dual Instruction Set Processors.
Proceedings of the 3rd International Workshop on Worst-Case Execution Time Analysis, 2003
Code Generation for a Dual Instruction Set Processor Based on Selective Code Transformation.
Proceedings of the Software and Compilers for Embedded Systems, 7th International Workshop, 2003
Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
2002
IEEE Trans. Consumer Electron., 2002
Design, Implementation, and Performance Evaluation of a Detection-Based Adaptive Block Replacement Scheme.
IEEE Trans. Computers, 2002
Analysis of Worst Case DMA Response Time in a Fixed-Priority Bus Arbitration Protocol.
Real Time Syst., 2002
Embedded System Design Framework for Minimizing Code Size and Guaranteeing Real-Time Requirements.
Proceedings of the 23rd IEEE Real-Time Systems Symposium (RTSS'02), 2002
Proceedings of the 23rd IEEE Real-Time Systems Symposium (RTSS'02), 2002
Performance Comparison of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems.
Proceedings of the 8th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2002), 2002
SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms.
Proceedings of the Power-Aware Computer Systems, Second International Workshop, 2002
Proceedings of the International Symposium on Parallel Architectures, 2002
On Relaxing Task Isolation in Overrun Handling to Provide Probabilistic Guarantees to Soft Real-Time Tasks with Varying Execution Times.
Proceedings of the 14th Euromicro Conference on Real-Time Systems (ECRTS 2002), 2002
A Dynamic Voltage Scaling Algorithm for Dynamic-Priority Hard Real-Time Systems Using Slack Time Analysis.
Proceedings of the 2002 Design, 2002
2001
IEEE Trans. Software Eng., 2001
LRFU: A Spectrum of Policies that Subsumes the Least Recently Used and Least Frequently Used Policies.
IEEE Trans. Computers, 2001
Proceedings of The Workshop on Languages, 2001
Proceedings of the 15th International Conference on Information Networking, 2001
2000
IEEE Trans. Veh. Technol., 2000
Towards application/file-level characterization of block references: a case for fine-grained buffer management.
Proceedings of the 2000 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, 2000
A Low-Overhead, High-Performance Unified Buffer Management Scheme That Exploits Sequential and Looping References.
Proceedings of the 4th Symposium on Operating System Design and Implementation (OSDI 2000), 2000
1999
Proceedings of the 2nd USENIX Symposium on Internet Technologies and Systems, 1999
Proceedings of the 1999 USENIX Annual Technical Conference, 1999
On the Existence of a Spectrum of Policies that Subsumes the Least Recently Used (LRU) and Least Frequently Used (LFU) Policies.
Proceedings of the 1999 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, 1999
Analysis of the Impacts of Overestimation Sources on the Accuracy of Worst Case Timing Analysis.
Proceedings of the 20th IEEE Real-Time Systems Symposium, 1999
Proceedings of the 6th International Workshop on Real-Time Computing and Applications Symposium (RTCSA '99), 1999
1998
IEEE Trans. Computers, 1998
Microprocess. Microsystems, 1998
Proceedings of the 19th IEEE Real-Time Systems Symposium, 1998
Proceedings of the 5th International Workshop on Real-Time Computing Systems and Applications (RTCSA '98), 1998
Proceedings of the Languages, 1998
An Adaptive Block Management Scheme Using On-Line Detection of Block Reference Patterns.
Proceedings of the International Workshop on Multi-Media Database Management Systems, 1998
1997
Real Time Syst., 1997
Microprocess. Microsystems, 1997
Inf. Process. Lett., 1997
Enhanced analysis of cache-related preemption delay in fixed-priority preemptive scheduling.
Proceedings of the 18th IEEE Real-Time Systems Symposium (RTSS '97), 1997
1996
Proceedings of the 17th IEEE Real-Time Systems Symposium (RTSS '96), 1996
Efficiently supporting hard/soft deadline transactions in real-time database systems.
Proceedings of the Third International Workshop on Real-Time Computing Systems Application (RTCSA '96), October 30, 1996
Proceedings of the 2nd IEEE Real-Time Technology and Applications Symposium, 1996
1995
IEEE Trans. Software Eng., 1995
Proceedings of the 16th IEEE Real-Time Systems Symposium, 1995
Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture (HPCA 1995), 1995
1994
Microprocess. Microprogramming, 1994
Int. J. High Speed Comput., 1994
Proceedings of the 15th IEEE Real-Time Systems Symposium (RTSS '94), 1994
1993
Microprocess. Microsystems, 1993
Microprocess. Microprogramming, 1993
Caller ID System in the Internet Environment.
Proceedings of the 4th USENIX Security Symposium, Santa Clara, CA, USA, October 4-6, 1993, 1993
A Dual-Mode Instruction Prefetch Scheme for Improved Worst Case and Average Case Program Execution Times.
Proceedings of the Real-Time Systems Symposium. Raleigh-Durham, NC, USA, December 1993, 1993
1992
Design and Analysis of a Scalable Cache Coherence Scheme Based on Clocks and Timestamps.
IEEE Trans. Parallel Distributed Syst., 1992
1991
Proceedings of the Third ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming (PPOPP), 1991
Proceedings of the ASPLOS-IV Proceedings, 1991
1990
An efficient caching support for critical sections in large-scale shared-memory multiprocessors.
Proceedings of the 4th international conference on Supercomputing, 1990
A Performance Comparison of Directory-based and Timestamp-based Cache Coherence Schemes.
Proceedings of the 1990 International Conference on Parallel Processing, 1990
Proceedings of the CONPAR 90, 1990
1989
A Timestamp-based Cache Coherence Scheme.
Proceedings of the International Conference on Parallel Processing, 1989