Yu-Hao Hsu

According to our database1, Yu-Hao Hsu authored at least 16 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
A 3-nm FinFET 27.6-Mbit/mm<sup>2</sup> Single-Port 6T SRAM Enabling 0.48-1.2 V Wide Operating Range With Far-End Pre-Charge and Weak-Bit Tracking.
IEEE J. Solid State Circuits, April, 2024

15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
A 3-nm 27.6-Mbit/mm2 Self-timed SRAM Enabling 0.48 - 1.2 V Wide Operating Range with Far-end Pre-charge and Weak-Bit Tracking.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A 4nm 6163-TOPS/W/b $\mathbf{4790-TOPS/mm^{2}/b}$ SRAM Based Digital-Computing-in-Memory Macro Supporting Bit-Width Flexibility and Simultaneous MAC and Weight Update.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2017
Preventing Misuse of Duplicate Certificates in IoT/M2M Systems.
Proceedings of the 26th International Conference on Computer Communication and Networks, 2017

2014
20-Gb/s CMOS EA/MZ Modulator Driver With Intrinsic Parasitic Feedback Network.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A 10-Gb/s Low Jitter Single-Loop Clock and Data Recovery Circuit With Rotational Phase Frequency Detector.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2013
Low Propagation Delay Load-Balanced 4 × 4 Switch Fabric IC in 0.13-µm CMOS Technology.
IEEE Trans. Very Large Scale Integr. Syst., 2013

2012
An 8 × 8 20 Gbps Reconfigurable Load Balanced TDM Switch IC for High-Speed Networking.
J. Signal Process. Syst., 2012

2011
A 10 to 11.5GHz rotational phase and frequency detector for clock recovery circuit.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Dynamic Frame Sizing Algorithm for CICQ Switches with 100% Throughput.
Proceedings of the INFOCOM 2009. 28th IEEE International Conference on Computer Communications, 2009

2008
A 28Gbps 4×4 switch with low jitter SerDes using area-saving RF model in 0.13µm CMOS technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
A Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC for High-Speed Networking Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A 20 Gbps Scalable Load Balanced Birkhoff-von Neumann Symmetric TDM Switch IC with SERDES Interfaces.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007


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