Yingda Dong

According to our database, Yingda Dong authored at least 6 papers between 2005 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Traditional pattern enhancement based on improved singular value decomposition and gamma function in the frequency domain.

Yingda Dong, Chunguang He, Yanping Qin, Yunmei Yuan, Fan Gao, Huaqiong Duo, Ximing Wang

J. Intell. Fuzzy Syst., December, 2023

Distributed Cycling in Charge Trap-Based 3D NAND Arrays: Model and Qualification Tests Implications.

Gianluca Nicosia, Niccolò Righetti, Yingda Dong

Proceedings of the IEEE International Memory Workshop, 2023

2017

11.1 A 512Gb 3b/cell flash memory on 64-word-line-layer BiCS technology.

Ryuji Yamashita, Sagar Magia, Tsutomu Higuchi, Kazuhide Yoneya, Toshio Yamamura, Hiroyuki Mizukoshi, Shingo Zaitsu, Minoru Yamashita, Shunichi Toyama, Norihiro Kamae, Juan Lee, Shuo Chen, Jiawei Tao, William Mak, Xiaohua Zhang, Ying Yu, Yuko Utsunomiya, Yosuke Kato, Manabu Sakai, Masahide Matsumoto, Hardwell Chibvongodze, Naoki Ookuma, Hiroki Yabe, Subodh Taigor, Rangarao Samineni, Takuyo Kodama, Yoshihiko Kamata, Yuzuru Namai, Jonathan Huynh, Sung-En Wang, Yankang He, Trung Pham, Vivek Saraf, Akshay Petkar, Mitsuyuki Watanabe, Koichiro Hayashi, Prashant Swarnkar, Hitoshi Miwa, Aditya Pradhan, Sulagna Dey, Debasish Dwibedy, Thushara Xavier, Muralikrishna Balaga, Samiksha Agarwal, Swaroop Kulkarni, Zameer Papasaheb, Sahil Deora, Patrick Hong, Meiling Wei, Gopinath Balakrishnan, Takuya Ariki, Kapil Verma, Chang Hua Siau, Yingda Dong, Ching-Huang Lu, Toru Miwa, Farookh Moogat

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2009

A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology.

Raul Cernea, Long Pham, Farookh Moogat, Siu Lung Chan, Binh Le, Yan Li, Shouchang Tsao, Taiyuan Tseng, Khanh Nguyen, Jason Li, Jayson Hu, Jonghak Yuh, Cynthia Hsu, Fanglin Zhang, Teruhiko Kamei, Hiroaki Nasu, Phil Kliza, Khin Htoo, Jeffrey Lutze, Yingda Dong, Masaaki Higashitani, Junhui Yang, Hung-Szu Lin, Vamshi Sakhamuri, Alan Li, Feng Pan, Sridhar Yadala, Subodh Taigor, Kishan Pradhan, James Lan, Jim Chan, Takumi Abe, Yasuyuki Fukuda, Hideo Mukai, Koichi Kawakami, Connie Liang, Tommy Ip, Shu-Fen Chang, Jaggi Lakshmipathi, Sharon Huynh, Dimitris Pantelakis, Mehrdad Mofidi, Khandker Quader

IEEE J. Solid State Circuits, 2009

2008

A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm.

Raul Cernea, Long Pham, Farookh Moogat, Siu Lung Chan, Binh Le, Yan Li, Shouchang Tsao, Taiyuan Tseng, Khanh Nguyen, Jason Li, Jayson Hu, Jong Park, Cynthia Hsu, Fanglin Zhang, Teruhiko Kamei, Hiroaki Nasu, Phil Kliza, Khin Htoo, Jeffery Lutze, Yingda Dong, Masaaki Higashitani, Junhui Yang, Hung-Szu Lin, Vamshi Sakhamuri, Alan Li, Feng Pan, Sridhar Yadala, Subodh Taigor, Kishan Pradhan, James Lan, Jim Chan, Takumi Abe, Yasuyuki Fukuda, Hideo Mukai, Koichi Kawakami, Connie Liang, Tommy Ip, Shu-Fen Chang, Jaggi Lakshmipathi, Sharon Huynh, Dimitris Pantelakis, Mehrdad Mofidi, Khandker Quader

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2005

Transistor and circuit design for 100-200-GHz ICs.

Zach Griffith, Yingda Dong, Dennis W. Scott, Yun Wei, Navin Parthasarathy, Mattias Dahlström, Christoph Kadow, Vamsi Paidi, Mark J. W. Rodwell, Miguel Urteaga, Richard Pierson, Petra Rowell, Bobby Brar, Sangmin Lee, Nguyen X. Nguyen, Chahn Nguyen

IEEE J. Solid State Circuits, 2005