Jason Li

According to our database, Jason Li authored at least 8 papers between 2008 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A 2Tb 4b/Cell 6-Plane 3D-Flash Memory with 37.6Gb/mm² Bit Density and >85MB/s Write Throughput.

Jayanth M. Thimmaiah, Ryuji Yamashita, In-Soo Yoon, Jason Li, Cynthia Hsu, Takuya Ariki, Naoki Ookuma, Yosuke Kato, Koichiro Hayashi, Kazuki Yamauchi, Indra K. V, Masahiro Kano, Sirisha Bhamidipati, Sneha Bhatia, Seema Malhotra, Naoki Ojima, Ella Wu, Zhiyong Yang, Frank W. Tsai, Mathias Bayle, Naoyuki Minami, Yasuyuki Fujihara, Kei Kitamura, Tomofumi Kitani, Takuyo Kodama, Takaya Handa, Naoaki Kanagawa, Yuki Ishizaki, Susumu Fujimura, Yoshinao Suzuki, Mario Sako, Yumi Higashi, Yoshihisa Watanabe, Toshiyuki Kouchi, Aravinth V, Chin-Yi Chen, Xiang Yang, Guirong Liang, Jenny Wang

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2022

A 1-Tb 4b/Cell 4-Plane 162-Layer 3D Flash Memory With a 2.4-Gb/s I/O Speed Interface.

Jong Yuh, Jason Li, Heguang Li, Yoshihiro Oyama, Cynthia Hsu, Pradeep Anantula, Stanley Jeong, Anirudh Amarnath, Siddhesh Darne, Sneha Bhatia, Tianyu Tang, Aditya Arya, Naman Rastogi, Naoki Ookuma, Hiroyuki Mizukoshi, Alex Yap, Demin Wang, Steve Kim, Yonggang Wu, Min Peng, Jason Lu, Tommy Ip, Seema Malhotra, David Han, Masatoshi Okumura, Jiwen Liu, John Sohn, Hardwell Chibvongodze, Muralikrishna Balaga, Aki Matsuda, Chakshu Puri, Chen Chen, Indra K. V, Chaitanya G, Venky Ramachandra, Yosuke Kato, Ravi Kumar, Huijuan Wang, Farookh Moogat, In-Soo Yoon, Kazushige Kanda, Takahiro Shimizu, Noboru Shibata, Takashi Shigeoka, Kosuke Yanagidaira, Takuyo Kodama, Ryo Fukuda, Yasuhiro Hirashima, Mitsuhiro Abe

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

30.4 A 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology.

Tsutomu Higuchi, Takuyo Kodama, Koji Kato, Ryo Fukuda, Naoya Tokiwa, Mitsuhiro Abe, Teruo Takagiwa, Yuki Shimizu, Junji Musha, Katsuaki Sakurai, Jumpei Sato, Tetsuaki Utsumi, Kazuhide Yoneya, Yasuhiro Suematsu, Toshifumi Hashimoto, Takeshi Hioka, Kosuke Yanagidaira, Masatsugu Kojima, Junya Matsuno, Kei Shiraishi, Kensuke Yamamoto, Shintaro Hayashi, Tomoharu Hashiguchi, Kazuko Inuzuka, Akio Sugahara, Mitsuaki Honma, Keiji Tsunoda, Kazumasa Yamamoto, Takahiro Sugimoto, Tomofumi Fujimura, Mizuki Kaneko, Hiroki Date, Osamu Kobayashi, Takatoshi Minamoto, Ryoichi Tachibana, Itaru Yamaguchi, Juan Lee, Venky Ramachandra, Srinivas Rajendra, Tianyu Tang, Siddhesh Darne, Jiwang Lee, Jason Li, Toru Miwa, Ryuji Yamashita, Hiroshi Sugawara, Naoki Ookuma, Masahiro Kano, Hiroyuki Mizukoshi, Yuki Kuniyoshi, Mitsuyuki Watanabe, Kei Akiyama, Hirotoshi Mori, Akira Arimizu, Yoshito Katano, Masakazu Ehama, Hiroshi Maejima, Koji Hosono, Masahiro Yoshihara

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019

A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology.

Chang Hua Siau, Kwang-Ho Kim, Seungpil Lee, Katsuaki Isobe, Noboru Shibata, Kapil Verma, Takuya Ariki, Jason Li, Jong Yuh, Anirudh Amarnath, Qui Nguyen, Ohwon Kwon, Stanley Jeong, Heguang Li, Hua-Ling Hsu, Taiyuan Tseng, Steve Choi, Siddhesh Darne, Pradeep Anantula, Alex Yap, Hardwell Chibvongodze, Hitoshi Miwa, Minoru Yamashita, Mitsuyuki Watanabe, Koichiro Hayashi, Yosuke Kato, Toru Miwa, Jang Yong Kang, Masatoshi Okumura, Naoki Ookuma, Muralikrishna Balaga, Venky Ramachandra, Aki Matsuda, Swaroop Kulkarni, Raghavendra Rachineni, Pai K. Manjunath, Masahito Takehara, Anil Pai, Srinivas Rajendra, Toshiki Hisada, Ryo Fukuda, Naoya Tokiwa, Kazuaki Kawaguchi, Masashi Yamaoka, Hiromitsu Komai, Takatoshi Minamoto, Masaki Unno, Susumu Ozawa, Hiroshi Nakamura, Tomoo Hishida, Yasuyuki Kajitani, Lei Lin

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2012

128Gb 3b/cell NAND flash memory in 19nm technology with 18MB/s write rate and 400Mb/s toggle mode.

Yan Li, Seungpil Lee, Ken Oowada, Hao Nguyen, Qui Nguyen, Nima Mokhlesi, Cynthia Hsu, Jason Li, Venky Ramachandra, Teruhiko Kamei, Masaaki Higashitani, Tuan Pham, Mitsuaki Honma, Yoshihisa Watanabe, Kazumi Ino, Binh Le, Byungki Woo, Khin Htoo, Taiyuan Tseng, Long Pham, Frank Tsai, Kwang-Ho Kim, Yi-Chieh Chen, Min She, Jonghak Yuh, Alex Chu, Chen Chen, Ruchi Puri, Hung-Szu Lin, Yi-Fang Chen, William Mak, Jonathan Huynh, Jim Chan, Mitsuyuki Watanabe, Daniel Yang, Grishma Shah, Pavithra Souriraj, Dinesh Tadepalli, Tenugu Suman, Ray Gao, Viski Popuri, Behdad Azarbayjani, Ravindra Madpur, James Lan, Emilio Yero, Feng Pan, Patrick Hong, Jang Yong Kang, Farookh Moogat, Yupin Fong, Raul Cernea, Sharon Huynh, Cuong Trinh, Mehrdad Mofidi, Ritu Shrivastava, Khandker Quader

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2009

A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology.

Raul Cernea, Long Pham, Farookh Moogat, Siu Lung Chan, Binh Le, Yan Li, Shouchang Tsao, Taiyuan Tseng, Khanh Nguyen, Jason Li, Jayson Hu, Jonghak Yuh, Cynthia Hsu, Fanglin Zhang, Teruhiko Kamei, Hiroaki Nasu, Phil Kliza, Khin Htoo, Jeffrey Lutze, Yingda Dong, Masaaki Higashitani, Junhui Yang, Hung-Szu Lin, Vamshi Sakhamuri, Alan Li, Feng Pan, Sridhar Yadala, Subodh Taigor, Kishan Pradhan, James Lan, Jim Chan, Takumi Abe, Yasuyuki Fukuda, Hideo Mukai, Koichi Kawakami, Connie Liang, Tommy Ip, Shu-Fen Chang, Jaggi Lakshmipathi, Sharon Huynh, Dimitris Pantelakis, Mehrdad Mofidi, Khandker Quader

IEEE J. Solid State Circuits, 2009

A 5.6MB/s 64Gb 4b/Cell NAND Flash memory in 43nm CMOS.

Cuong Trinh, Noboru Shibata, Takeshi Nakano, Mikio Ogawa, Jumpei Sato, Yoshikazu Takeyama, Katsuaki Isobe, Binh Le, Farookh Moogat, Nima Mokhlesi, Kenji Kozakai, Patrick Hong, Teruhiko Kamei, Kiyoaki Iwasa, J. Nakai, Takahiro Shimizu, Mitsuaki Honma, Shintaro Sakai, Toshimasa Kawaai, Satoru Hoshi, Jonghak Yuh, Cynthia Hsu, Taiyuan Tseng, Jason Li, Jayson Hu, M. Liu, Shahzad Khalid, J. Chen, Mitsuyuki Watanabe, Hung-Szu Lin, Junhui Yang, K. McKay, Khanh Nguyen, Tuan Pham, Y. Matsuda, K. Nakamura, Kazunori Kanebako, Susumu Yoshikawa, W. Igarashi, Atsushi Inoue, T. Takahashi, Yukio Komatsu, C. Suzuki, Kousuke Kanazawa, Masaaki Higashitani, Seungpil Lee, T. Murai, K. Nguyen, James Lan, Sharon Huynh, Mark Murin, Mark Shlick, Menahem Lasser, Raul Cernea, Mehrdad Mofidi, K. Schuegraf, Khandker Quader

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008

A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm.

Raul Cernea, Long Pham, Farookh Moogat, Siu Lung Chan, Binh Le, Yan Li, Shouchang Tsao, Taiyuan Tseng, Khanh Nguyen, Jason Li, Jayson Hu, Jong Park, Cynthia Hsu, Fanglin Zhang, Teruhiko Kamei, Hiroaki Nasu, Phil Kliza, Khin Htoo, Jeffery Lutze, Yingda Dong, Masaaki Higashitani, Junhui Yang, Hung-Szu Lin, Vamshi Sakhamuri, Alan Li, Feng Pan, Sridhar Yadala, Subodh Taigor, Kishan Pradhan, James Lan, Jim Chan, Takumi Abe, Yasuyuki Fukuda, Hideo Mukai, Koichi Kawakami, Connie Liang, Tommy Ip, Shu-Fen Chang, Jaggi Lakshmipathi, Sharon Huynh, Dimitris Pantelakis, Mehrdad Mofidi, Khandker Quader

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008