Takuya Ariki

According to our database, Takuya Ariki authored at least 7 papers between 2012 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A 29-Gb/mm² 1-Tb 3-b/Cell 3-D Flash Memory With CMOS Direct Bonded Array (CBA) Technology.

Kosuke Yanagidaira, Mario Sako, Yasuhiro Hirashima, Yumi Higashi, Yutaka Shimizu, Takeshi Nakano, Yusuke Ochi, Hiroaki Yamada, Nobushi Matsuura, Akihiro Imamoto, Kazuaki Kawaguchi, Koji Tabata, Hiroaki Hoshino, Takeshi Hioka, Shigehito Saigusa, Hiroki Date, Masaki Unno, Jumpei Sato, You Kamata, Takahiro Shimizu, Akio Sugahara, Taira Shibuya, Atsushi Okuyama, Junji Yamada, Takatoshi Minamoto, Hardwell Chibvongodze, Naoki Ojima, Hiroshi Sugawara, Masahiro Kano, Jang-Woo Lee, Hiroyuki Mizukoshi, Ryuji Yamashita, Kensaku Abe, Naohito Morozumi, In-Soo Yoon, Takuya Ariki, Jong Hak Yuh, Khin Htoo, Yosuke Kato, Yoshihiro Oyama, Yen-Lung Jason Li, Yoshihisa Watanabe, Toshiyuki Kouchi, Koji Hosono

IEEE J. Solid State Circuits, January, 2026

A 2Tb 4b/Cell 6-Plane 3D-Flash Memory with 37.6Gb/mm² Bit Density and >85MB/s Write Throughput.

Jayanth M. Thimmaiah, Ryuji Yamashita, In-Soo Yoon, Jason Li, Cynthia Hsu, Takuya Ariki, Naoki Ookuma, Yosuke Kato, Koichiro Hayashi, Kazuki Yamauchi, Indra K. V, Masahiro Kano, Sirisha Bhamidipati, Sneha Bhatia, Seema Malhotra, Naoki Ojima, Ella Wu, Zhiyong Yang, Frank W. Tsai, Mathias Bayle, Naoyuki Minami, Yasuyuki Fujihara, Kei Kitamura, Tomofumi Kitani, Takuyo Kodama, Takaya Handa, Naoaki Kanagawa, Yuki Ishizaki, Susumu Fujimura, Yoshinao Suzuki, Mario Sako, Yumi Higashi, Yoshihisa Watanabe, Toshiyuki Kouchi, Aravinth V, Chin-Yi Chen, Xiang Yang, Guirong Liang, Jenny Wang

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025

A 1Tb 3b/cell 3D-Flash Memory with a 29%-Improved-Energy-Efficiency Read Operation and 4.8Gb/s Power-Isolated Low-Tapped-Termination I/Os.

Kosuke Yanagidaira, Mario Sako, Yasuhiro Hirashima, Junya Matsuno, Yumi Higashi, Yutaka Shimizu, Akihiro Imamoto, Kazuaki Kawaguchi, Koji Tabata, Takeshi Nakano, Yusuke Ochi, Hiroaki Hoshino, Takeshi Hioka, Shigehito Saigusa, Hiroki Date, Masaki Unno, Jumpei Sato, You Kamata, Hardwell Chibvongodze, Naoki Ojima, Hiroshi Sugawara, Masahiro Kano, Jang-woo Lee, Hiroyuki Mizukoshi, Ryuji Yamashita, Kensaku Abe, Naohito Morozumi, In-Soo Yoon, Takuya Ariki, Jong Hak Yuh, Khin Htoo, Yosuke Kato, Yoshihisa Watanabe, Toshiyuki Kouchi

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

Crossed Bit Line (CBL) Architecture in 3D Flash Memory CMOS Directly Bonded to Array (CBA) Structure.

Hiroshi Maejima, Katsuaki Isobe, N. Okada, Masaki Unno, T. Hashimoto, Tetsuaki Utsumi, T. Hisada, K. Maruyama, Toshiyuki Kouchi, T. Kotani, Hitoshi Shiga, O. Kwon, A. Ganguly, Y. Wu, Hiroki Yabe, I. Lu, F. Toyama, Naohito Morozumi, Masahito Takehara, Takuya Ariki, I. Yoon

Proceedings of the IEEE International Memory Workshop, 2025

2019

A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology.

Chang Hua Siau, Kwang-Ho Kim, Seungpil Lee, Katsuaki Isobe, Noboru Shibata, Kapil Verma, Takuya Ariki, Jason Li, Jong Yuh, Anirudh Amarnath, Qui Nguyen, Ohwon Kwon, Stanley Jeong, Heguang Li, Hua-Ling Hsu, Taiyuan Tseng, Steve Choi, Siddhesh Darne, Pradeep Anantula, Alex Yap, Hardwell Chibvongodze, Hitoshi Miwa, Minoru Yamashita, Mitsuyuki Watanabe, Koichiro Hayashi, Yosuke Kato, Toru Miwa, Jang Yong Kang, Masatoshi Okumura, Naoki Ookuma, Muralikrishna Balaga, Venky Ramachandra, Aki Matsuda, Swaroop Kulkarni, Raghavendra Rachineni, Pai K. Manjunath, Masahito Takehara, Anil Pai, Srinivas Rajendra, Toshiki Hisada, Ryo Fukuda, Naoya Tokiwa, Kazuaki Kawaguchi, Masashi Yamaoka, Hiromitsu Komai, Takatoshi Minamoto, Masaki Unno, Susumu Ozawa, Hiroshi Nakamura, Tomoo Hishida, Yasuyuki Kajitani, Lei Lin

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2017

11.1 A 512Gb 3b/cell flash memory on 64-word-line-layer BiCS technology.

Ryuji Yamashita, Sagar Magia, Tsutomu Higuchi, Kazuhide Yoneya, Toshio Yamamura, Hiroyuki Mizukoshi, Shingo Zaitsu, Minoru Yamashita, Shunichi Toyama, Norihiro Kamae, Juan Lee, Shuo Chen, Jiawei Tao, William Mak, Xiaohua Zhang, Ying Yu, Yuko Utsunomiya, Yosuke Kato, Manabu Sakai, Masahide Matsumoto, Hardwell Chibvongodze, Naoki Ookuma, Hiroki Yabe, Subodh Taigor, Rangarao Samineni, Takuyo Kodama, Yoshihiko Kamata, Yuzuru Namai, Jonathan Huynh, Sung-En Wang, Yankang He, Trung Pham, Vivek Saraf, Akshay Petkar, Mitsuyuki Watanabe, Koichiro Hayashi, Prashant Swarnkar, Hitoshi Miwa, Aditya Pradhan, Sulagna Dey, Debasish Dwibedy, Thushara Xavier, Muralikrishna Balaga, Samiksha Agarwal, Swaroop Kulkarni, Zameer Papasaheb, Sahil Deora, Patrick Hong, Meiling Wei, Gopinath Balakrishnan, Takuya Ariki, Kapil Verma, Chang Hua Siau, Yingda Dong, Ching-Huang Lu, Toru Miwa, Farookh Moogat

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2012

A 19nm 112.8mm² 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface.

Noboru Shibata, Kazushige Kanda, Toshiki Hisada, Katsuaki Isobe, Manabu Sato, Yui Shimizu, Takahiro Shimizu, Takahiro Sugimoto, Tomohiro Kobayashi, Kazuko Inuzuka, Naoaki Kanagawa, Yasuyuki Kajitani, Takeshi Ogawa, J. Nakai, Kiyoaki Iwasa, Masatsugu Kojima, Toshihiro Suzuki, Yuya Suzuki, Shintaro Sakai, Tomofumi Fujimura, Yuko Utsunomiya, Toshifumi Hashimoto, Makoto Miakashi, Naoki Kobayashi, M. Inagaki, Yuuki Matsumoto, Satoshi Inoue, Yoshinao Suzuki, D. He, Yasuhiko Honda, Junji Musha, Masaki Nakagawa, Mitsuaki Honma, Naofumi Abiko, Mitsumasa Koyanagi, Masahiro Yoshihara, Kazumi Ino, Mitsuhiro Noguchi, Teruhiko Kamei, Yosuke Kato, Shingo Zaitsu, Hiroaki Nasu, Takuya Ariki, Hardwell Chibvongodze, Mitsuyuki Watanabe, Hong Ding, Naoki Ookuma, Ryuji Yamashita, G. Liang, Gertjan Hemink, Farookh Moogat, Cuong Trinh, Masaaki Higashitani, Tuan Pham, Kousuke Kanazawa

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012