Chang Hua Siau

According to our database1, Chang Hua Siau authored at least 6 papers between 2010 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019

2017

2014
A 130.7-mm<sup>2</sup> 2-Layer 32-Gb ReRAM Memory Device in 24-nm Technology.
IEEE J. Solid State Circuits, 2014

2013

2011
Low power cross-point memory architecture.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010
A 0.13µm 64Mb multi-layered conductive metal-oxide memory.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010


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