Yongkang Han
According to our database1,
Yongkang Han
authored at least 7 papers
between 2021 and 2025.
Collaborative distances:
Collaborative distances:
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Bibliography
2025
A Novel Neuromorphic Hardware Using Area-Efficient Chain RRAM-Based Synapses and Compact Neurons With (Anti-) Integration Scheme.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2025
A High Performance Dual-Wordline RRAM Macro with Replica Bitline Delay Control Circuit.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
A 1024-Spin Scalable Ising Machine With Capacitive Coupling and Progressive Annealing Method for Combination Optimization Problems.
IEEE Trans. Circuits Syst. II Express Briefs, December, 2024
A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier.
IEEE J. Solid State Circuits, January, 2024
2023
An ADC-Less RRAM-Based Computing-in-Memory Macro With Binary CNN for Efficient Edge AI.
IEEE Trans. Circuits Syst. II Express Briefs, June, 2023
A 9Mb HZO-Based Embedded FeRAM with 10<sup>12</sup>-Cycle Endurance and 5/7ns Read/Write using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021