Chunmeng Dou
Orcid: 0000-0003-2192-9655
According to our database1,
Chunmeng Dou
authored at least 26 papers
between 2012 and 2024.
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Bibliography
2024
Write-Verify-Free MLC RRAM Using Nonbinary Encoding for AI Weight Storage at the Edge.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024
A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier.
IEEE J. Solid State Circuits, January, 2024
Binary-Stochasticity-Enabled Highly Efficient Neuromorphic Deep Learning Achieves Better-than-Software Accuracy.
Adv. Intell. Syst., January, 2024
34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A 40-nm SONOS Digital CIM Using Simplified LUT Multiplier and Continuous Sample-Hold Sense Amplifier for AI Edge Inference.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023
A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference.
IEEE J. Solid State Circuits, October, 2023
An ADC-Less RRAM-Based Computing-in-Memory Macro With Binary CNN for Efficient Edge AI.
IEEE Trans. Circuits Syst. II Express Briefs, June, 2023
Binary stochasticity enabled highly efficient neuromorphic deep learning achieves better-than-software accuracy.
CoRR, 2023
A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A 9Mb HZO-Based Embedded FeRAM with 10<sup>12</sup>-Cycle Endurance and 5/7ns Read/Write using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2022
STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse.
IEEE J. Solid State Circuits, 2022
Mixed-Precision Continual Learning Based on Computational Resistance Random Access Memory.
Adv. Intell. Syst., 2022
Few-shot graph learning with robust and energy-efficient memory-augmented graph neural network (MAGNN) based on homogeneous computing-in-memory.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
RRAM Computing-in-Memory Using Transient Charge Transferring for Low-Power and Small-Latency AI Edge Inference.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
A 55nm 32Mb Digital Flash CIM Using Compressed LUT Multiplier and Low Power WL Voltage Trimming Scheme for AI Edge Inference.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
Efficient and Robust Nonvolatile Computing-In-Memory Based on Voltage Division in 2T2R RRAM With Input-Dependent Sensing Control.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
A 40nm 1Mb 35.6 TOPS/W MLC NOR-Flash Based Computation-in-Memory Structure for Machine Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Sparsity-Aware Clamping Readout Scheme for High Parallelism and Low Power Nonvolatile Computing-in-Memory Based on Resistive Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
MLFlash-CIM: Embedded Multi-Level NOR-Flash Cell based Computing in Memory Architecture for Edge AI Devices.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2019
A 0.75 V reference clamping sense amplifier for low-power high-density ReRAM with dynamic pre-charge technique.
IEICE Electron. Express, 2019
An Asynchronous AER Circuits with Rotation Priority Tree Arbiter for Neuromorphic Hardware with Analog Neuron.
Proceedings of the 13th IEEE International Conference on ASIC, 2019
2017
Challenges of emerging memory and memristor based circuits: Nonvolatile logics, IoT security, deep learning and neuromorphic computing.
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2014
Characterization of interface state density of three-dimensional Si nanostructure by charge pumping measurement.
Microelectron. Reliab., 2014
Determination of energy and spatial distribution of oxide border traps in In<sub>0.53</sub>Ga<sub>0.47</sub>As MOS capacitors from capacitance-voltage characteristics measured at various temperatures.
Microelectron. Reliab., 2014
2012
Resistive switching behavior of a CeO<sub>2</sub> based ReRAM cell incorporated with Si buffer layer.
Microelectron. Reliab., 2012