Youngwoo Jo

Orcid: 0000-0002-3427-7257

According to our database1, Youngwoo Jo authored at least 3 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A 16GHz 33fs rms Integrated Jitter FLL-less Gear Shifting Reference Sampling PLL.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2018
A 3.2-GHz Supply Noise-Insensitive PLL Using a Gate-Voltage-Boosted Source-Follower Regulator and Residual Noise Cancellation.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2015
14.4 A 5GHz -95dBc-reference-Spur 9.5mW digital fractional-N PLL using reference-multiplied time-to-digital converter and reference-spur cancellation in 65nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015


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