Yukimasa Miyamoto

Orcid: 0009-0006-8703-8950

According to our database1, Yukimasa Miyamoto authored at least 6 papers between 2003 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Corrigendum: Analysis and Evaluation of Using Microsecond-Latency Memory for In-Memory Indices and Caches in SSD-Based Key-Value Stores: [Experiments & Analysis].
Proc. ACM Manag. Data, February, 2026

2025
Analysis and Evaluation of Using Microsecond-Latency Memory for In-Memory Indices and Caches in SSD-Based Key-Value Stores.
Proc. ACM Manag. Data, 2025

2014
A UHS-II SD card controller with 240MB/s write throughput and 260MB/s read throughput.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2008
A 9.7mW AAC-Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward-Body-Biasing and Power-Gating Circuit in 65nm CMOS Technology.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2005
Development of Image Recognition Processor Based on Configurable Processor.
J. Robotics Mechatronics, 2005

2003
Visconti: multi-VLIW image recognition processor based on configurable processor [obstacle detection applications].
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003


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