Y. Watanabe
This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.
Bibliography
2023
A 1Tb 3b/Cell 3D-Flash Memory of more than 17Gb/mm<sup>2</sup> bit density with 3.2Gbps interface and 205MB/s program throughput.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2018
Polysilicon resistor stability under voltage stress for safe-operating area characterization.
Proceedings of the IEEE International Reliability Physics Symposium, 2018
2016
Proceedings of the IEEE International Conference on Consumer Electronics, 2016
2015
2014
2008
A 9.7mW AAC-Decoding, 620mW H.264 720p 60fps Decoding, 8-Core Media Processor with Embedded Forward-Body-Biasing and Power-Gating Circuit in 65nm CMOS Technology.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2004
Measurement of acetabular cup orientation in total hip arthroplasty using a volume registration technique.
Proceedings of the CARS 2004. Computer Assisted Radiology and Surgery. Proceedings of the 18th International Congress and Exhibition, 2004
Automatic motion correction for quantification of myocardial perfusion using dynamic magnetic resonance imaging.
Proceedings of the CARS 2004. Computer Assisted Radiology and Surgery. Proceedings of the 18th International Congress and Exhibition, 2004
2001
Comput. Graph. Forum, 2001
1996
Navigation system based on ceiling landmark recognition for autonomous mobile robot -position/orientation control by landmark recognition with plus and minus primitives.
Proceedings of the 1996 IEEE International Conference on Robotics and Automation, 1996