Yunzhi Dong

Orcid: 0009-0001-3890-7148

According to our database1, Yunzhi Dong authored at least 18 papers between 2008 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Towards Building Edge-side Common Data Processing Services on The Computing Continuum.
Proceedings of the 24th International Middleware Conference Demos, 2023

2021
Introduction to the Special Section on High-Speed Wireline and Optical Communication Circuits and Systems.
IEEE Open J. Circuits Syst., 2021

2020
16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018
A -89-dBc IMD3 DAC Sub-System in a 465-MHz BW CT Delta-Sigma ADC Using a Power and Area Efficient Calibration Technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

2017
Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS.
IEEE J. Solid State Circuits, 2016

15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014
A Continuous-Time 0-3 MASH ADC Achieving 88 dB DR With 53 MHz BW in 28 nm CMOS.
IEEE J. Solid State Circuits, 2014

29.2 A 235mW CT 0-3 MASH ADC achieving -167dBFS/Hz NSD with 53MHz BW.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Advances in high-speed continuous-time delta-sigma modulators.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
A 4-Gbps POF Receiver Using Linear Equalizer With Multi-Shunt-Shunt Feedbacks in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

2012
A High-Speed Fully-Integrated POF Receiver With Large-Area Photo Detectors in 65 nm CMOS.
IEEE J. Solid State Circuits, 2012

2011
A monolithic 3.125 Gbps fiber optic receiver front-end for POF applications in 65 nm CMOS.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
System and circuit considerations for low-complexity constant-envelope FM-UWB.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Analog front-end for a 3 Gb/s POF receiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Short Range, Low Data Rate, 7.2 GHz-7.7 GHz FM-UWB Receiver Front-End.
IEEE J. Solid State Circuits, 2009

2008
A 9mW high band FM-UWB receiver front-end.
Proceedings of the ESSCIRC 2008, 2008

Energy-efficient wireless front-end concepts for ultra lower power radio.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008


  Loading...