Clear: c̲ross-l̲ayer e̲xploration for a̲rchitecting r̲esilience combining hardware and software techniques to tolerate soft errors in processor cores.

[BibT_eX]

[DOI]

Eric Cheng

Shahrzad Mirkhani

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Robust power management in the IBM z13.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2015

Active Memory Cube: A processing-in-memory architecture for exascale systems.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2015

Understanding the propagation of transient errors in HPC applications.

[BibT_eX]

[DOI]

Proceedings of the International Conference for High Performance Computing, 2015

Safe limits on voltage reduction efficiency in GPUs: a direct measurement approach.

[BibT_eX]

[DOI]

Proceedings of the 48th International Symposium on Microarchitecture, 2015

Experience report: An application-specific checkpointing technique for minimizing checkpoint corruption.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Symposium on Software Reliability Engineering, 2015

Power-efficient embedded processing with resilience and real-time constraints.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Resilient mobile cognition: Algorithms, innovations, and architectures.

[BibT_eX]

[DOI]

Sharathchandra Pankanti

Pradip Bose

H. Akbarpour

Filiz Bunyak

Kannappan Palaniappan

Guna Seetharaman

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Resilient, UAV-embedded real-time computing.

[BibT_eX]

[DOI]

Sharathchandra Pankanti

Pradip Bose

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Quantifying sources of error in McPAT and potential impacts on architectural studies.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Increasing multicore system efficiency through intelligent bandwidth shifting.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

2014

Adaptive Prefetching on POWER7: Improving Performance and Power Consumption.

[BibT_eX]

[DOI]

ACM Trans. Parallel Comput., 2014

Special Series on Harsh Chips [Guest editors' introduction].

[BibT_eX]

[DOI]

Augusto Vega

Alper Buyuktosunoglu

Pradip Bose

IEEE Micro, 2014

Addressing failures in exascale computing.

[BibT_eX]

[DOI]

Int. J. High Perform. Comput. Appl., 2014

The resilience wall: Cross-layer solution strategies.

[BibT_eX]

[DOI]

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

Understanding Soft Error Resiliency of Blue Gene/Q Compute Chip through Hardware Proton Irradiation and Software Fault Injection.

[BibT_eX]

[DOI]

Proceedings of the International Conference for High Performance Computing, 2014

Voltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities.

[BibT_eX]

[DOI]

Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

Energy-secure computer architectures.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 2014 International Test Conference, 2014

Empirically derived abstractions in uncore power modeling for a server-class processor chip.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design, 2014

Characterization of transient error tolerance for a class of mobile embedded applications.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014

3D stacking of high-performance processors.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2013

SMT Malleability in IBM POWER5 and POWER6 Processors.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Application-level power and performance characterization and optimization on IBM Blue Gene/Q systems.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2013

SMT Switch: Software Mechanisms for Power Shifting.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2013

Is dark silicon real?: technical perspective.

[BibT_eX]

[DOI]

Pradip Bose

Commun. ACM, 2013

Crank it up or dial it down: coordinated multiprocessor frequency and folding control.

[BibT_eX]

[DOI]

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

Keynote address thursday: Efficient resilience in future systems: Design and modeling challenges.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 2013 IEEE International Test Conference, 2013

SMT-centric power-aware thread placement in chip multiprocessors.

[BibT_eX]

[DOI]

Augusto Vega

Alper Buyuktosunoglu

Pradip Bose

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012

Energy-aware meeting scheduling algorithms for smart buildings.

[BibT_eX]

[DOI]

Abhinandan Majumdar

David H. Albonesi

Pradip Bose

Proceedings of the BuildSys '12 Proceedings of the Fourth ACM Workshop on Embedded Sensing Systems for Energy-Efficiency in Buildings, 2012

Systematic Energy Characterization of CMP/SMT Processor Systems via Automated Micro-Benchmarks.

[BibT_eX]

[DOI]

Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

Energy-secure computing.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the International Symposium on Low Power Electronics and Design, 2012

Architectural perspectives of future wireless base stations based on the IBM PowerEN™ processor.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

Power management of multi-core chips: Challenges and pitfalls.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Making data prefetch smarter: adaptive prefetching on POWER7.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011

Power Wall.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the Encyclopedia of Parallel Computing, 2011

Error Tolerance in Server Class Processors.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Energy-Aware Accounting and Billing in Large-Scale Computing Facilities.

[BibT_eX]

[DOI]

IEEE Micro, 2011

Introducing the Adaptive Energy Management Features of the Power7 Chip.

[BibT_eX]

[DOI]

IEEE Micro, 2011

Adaptive energy-management features of the IBM POWER7 chip.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2011

Characterizing Power and Temperature Behavior of POWER6-Based System.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

Curbing energy cravings in networks: A cross-sectional view across the micro-macro boundary.

[BibT_eX]

[DOI]

Amlan Ganguly

Partha Kundu

Pradip Bose

Proceedings of the NOCS 2011, 2011

Keynote II: Integrated modeling challenges in extreme-scale computing.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

A case for guarded power gating for multi-core processors.

[BibT_eX]

[DOI]

Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

Abstraction and microarchitecture scaling in early-stage power modeling.

[BibT_eX]

[DOI]

Richard J. Eickemeyer

Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

Variation-Tolerant Microprocessor Architecture at Low Power.

[BibT_eX]

[DOI]

Meeta Sharma Gupta

Pradip Bose

Proceedings of the Low-Power Variation-Tolerant Design in Nanometer Silicon, 2011

2010

Trends and techniques for energy efficient architectures.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

Guarded Power Gating in a Multi-core Setting.

[BibT_eX]

[DOI]

Proceedings of the Computer Architecture, 2010

Power-efficient, reliable microprocessor architectures: modeling and design methods.

[BibT_eX]

[DOI]

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Performance and power evaluation of an in-line accelerator.

[BibT_eX]

[DOI]

Proceedings of the 7th Conference on Computing Frontiers, 2010

Power and thermal characterization of POWER6 system.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009

Guest Editors' Introduction: Reliability Challenges in Nano-CMOS Design.

[BibT_eX]

[DOI]

Yu Cao

Jim Tschanz

Pradip Bose

IEEE Des. Test Comput., 2009

Tribeca: design for PVT variations with local recovery and fine-grained adaptation.

[BibT_eX]

[DOI]

Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Multicore power management: Ensuring robustness via early-stage formal verification.

[BibT_eX]

[DOI]

Proceedings of the 7th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2009), 2009

Dynamic power gating with quality guarantees.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

2008

Phaser: Phased methodology for modeling the system-level effects of soft errors.

[BibT_eX]

[DOI]

IBM J. Res. Dev., 2008

Metrics for Architecture-Level Lifetime Reliability Analysis.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2008

A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime.

[BibT_eX]

[DOI]

Jeonghee Shin

Victor V. Zyuban

Pradip Bose

Timothy Mark Pinkston

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

Online Estimation of Architectural Vulnerability Factor for Soft Errors.

[BibT_eX]

[DOI]

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

Exploring power management in multi-core systems.

[BibT_eX]

[DOI]

Reinaldo A. Bergamaschi

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

Introduction to the special issue on the 2006 reconfigurable and adaptive architecture workshop.

[BibT_eX]

[DOI]

Aneesh Aggarwal

Pradip Bose

Mohamed Zahran

SIGARCH Comput. Archit. News, 2007

Low-Power Design and Temperature Management.

[BibT_eX]

[DOI]

IEEE Micro, 2007

Hotspot-Limited Microprocessors: Direct Temperature and Power Distribution Measurements.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

Temperature-limited microprocessors: Measurements and design implications.

[BibT_eX]

[DOI]

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Evaluating design tradeoffs in on-chip power management for CMPs.

[BibT_eX]

[DOI]

Joseph J. Sharkey

Alper Buyuktosunoglu

Pradip Bose

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Thermal-aware task scheduling at the system software level.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

A Framework for Architecture-Level Lifetime Reliability Modeling.

[BibT_eX]

[DOI]

Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007

Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions.

[BibT_eX]

[DOI]

Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007

Performance modeling for early analysis of multi-core systems.

[BibT_eX]

[DOI]

Reinaldo A. Bergamaschi

Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

2006

Looking briefly back, and then forward...

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2006

Designing reliable systems with unreliable components.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2006

Pre-Silicon Modeling and Analysis: Impact On Real Design.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2006

Robust On-Chip Communication.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2006

Workload characterization: A key aspect of microarchitecture design.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2006

Measuring the impact of microarchitectural ideas.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2006

An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget.

[BibT_eX]

[DOI]

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

2005

Guest Editors' Introduction: Energy-Efficient Design.

[BibT_eX]

[DOI]

Kunio Uchiyama

Pradip Bose

IEEE Micro, 2005

Lifetime Reliability: Toward an Architectural Solution.

[BibT_eX]

[DOI]

IEEE Micro, 2005

Designing microprocessors with robust functionality and performance.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2005

High performance at affordable power.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2005

Presilicon modeling: challenges in the late CMOS era.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2005

Integrated microarchitectures.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2005

Variation-tolerant design.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2005

The "power" of communication.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2005

Power-Aware, Reliable Microprocessor Design.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Exploiting Structural Duplication for Lifetime Reliability Enhancement.

[BibT_eX]

[DOI]

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors.

[BibT_eX]

[DOI]

Richard J. Eickemeyer

Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Conference on Dependable Systems and Networks (DSN 2005), 28 June, 2005

2004

Integrated Analysis of Power and Performance for Pipelined Microprocessors.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2004

Power-performance simulation: design and validation strategies.

[BibT_eX]

[DOI]

David M. Brooks

Pradip Bose

Margaret Martonosi

SIGMETRICS Perform. Evaluation Rev., 2004

Computer architecture research: Shifting priorities and newer challenges.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2004

Communication versus Computation.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2004

Editor in Chief's Message: Saving power-Lessons from embedded systems.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2004

EIC's Message: General-purpose versus application-specific processors.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2004

EIC's Message: Chip-level microarchitecture trends.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2004

Editor in Chief's Message: New Challenges and Burning Issues.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2004

Understanding the energy efficiency of simultaneous multithreading.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

Microarchitectural techniques for power gating of execution units.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

The Case for Lifetime Reliability-Aware Microprocessors.

[BibT_eX]

[DOI]

Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

The Impact of Technology Scaling on Lifetime Reliability.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Conference on Dependable Systems and Networks (DSN 2004), 28 June, 2004

2003

Guest Editors' Introduction: Micro's Top Picks from Microarchitecture Conferences.

[BibT_eX]

[DOI]

IEEE Micro, 2003

Guest Editors' Introduction: Power and Complexity Aware Design.

[BibT_eX]

[DOI]

Pradip Bose

David H. Albonesi

Diana Marculescu

IEEE Micro, 2003

Editor-in-Chief's Message: Adapting Old Paradigms to Meet New Challenges.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2003

Design and Integration: Chip- and System-Level Challenges.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2003

Issues and Trends in High-Performance Processor Cores.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2003

Looking Forward to Bright New Beginnings.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Micro, 2003

New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors.

[BibT_eX]

[DOI]

Michael G. Rosenfield

IBM J. Res. Dev., 2003

Dynamically Tuning Processor Resources with Adaptive Processing.

[BibT_eX]

[DOI]

David H. Albonesi

Rajeev Balasubramonian

Computer, 2003

Energy Efficient Co-Adaptive Instruction Fetch and Issue.

[BibT_eX]

[DOI]

Proceedings of the 30th International Symposium on Computer Architecture (ISCA 2003), 2003

2002

Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.

[BibT_eX]

[DOI]

Proceedings of the Power-Aware Computer Systems, Second International Workshop, 2002

Optimizing pipelines for power and performance.

[BibT_eX]

[DOI]

Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

Saving energy with just in time instruction delivery.

[BibT_eX]

[DOI]

Tejas Karkhanis

James E. Smith

Pradip Bose

Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

Tradeoffs in power-efficient issue queue design.

[BibT_eX]

[DOI]

Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

Synchronous Interlocked Pipelines.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 2002

2001

A circuit level implementation of an adaptive issue queue for power-aware microprocessors.

[BibT_eX]

[DOI]

Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

Ensuring Dependable Processor Performance: An Experience Report on Pre-Silicon Performance Validation.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 2001 International Conference on Dependable Systems and Networks (DSN 2001) (formerly: FTCS), 2001

2000

Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors.

[BibT_eX]

[DOI]

IEEE Micro, 2000

Testing for Function and Performance: Towards an Integrated Processor Validation Methodology.

[BibT_eX]

[DOI]

Pradip Bose

J. Electron. Test., 2000

Simulation and analysis in the small: the case for simple models, metrics and microbenchmarks in computer architecture teaching and research.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 2000 workshop on Computer architecture education, 2000

Performance and Functional Verification of Microprocessors.

[BibT_eX]

[DOI]

Pradip Bose

Jacob A. Abraham

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

An Adaptive Issue Queue for Reduced Power at High Performance.

[BibT_eX]

[DOI]

Proceedings of the Power-Aware Computer Systems, First International Workshop, 2000

Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor.

[BibT_eX]

[DOI]

Proceedings of the Power-Aware Computer Systems, First International Workshop, 2000

1999

Challenges in processor modeling and validation [Guest Editors?? introduction].

[BibT_eX]

[DOI]

Pradip Bose

Thomas M. Conte

Todd M. Austin

IEEE Micro, 1999

Bounds modelling and compiler optimizations for superscalar performance tuning.

[BibT_eX]

[DOI]

J. Syst. Archit., 1999

Performance Evaluation and Validation of Microprocessors.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 1999 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, 1999

Validation of Turandot, a fast processor model for microarchitecture exploration.

[BibT_eX]

[DOI]

Mayan Moudgill

Pradip Bose

Jaime H. Moreno

Proceedings of the IEEE International Performance Computing and Communications Conference, 1999

1998

Performance Analysis and Its Impact on Design.

[BibT_eX]

[DOI]

Pradip Bose

Thomas M. Conte

Computer, 1998

Performance Test Case Generation for Microprocessors.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

1997

Preface.

[BibT_eX]

[DOI]

Pradip Bose

IBM J. Res. Dev., 1997

Accuracy and Speedup of Parallel Trace-Driven Architectural Simulation.

[BibT_eX]

[DOI]

Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

1996

Computer architecture education in a corporate reengineering program.

[BibT_eX]

[DOI]

Pradip Bose

Philip G. Emma

Proceedings of the 1996 workshop on Computer architecture education, 1996

Representative Traces for Processor Models with Infinite Cache.

[BibT_eX]

[DOI]

Vijay S. Iyengar

Louise Trevillyan

Pradip Bose

Proceedings of the Second International Symposium on High-Performance Computer Architecture, 1996

1995

Architectural timing verification of CMOS RISC processors.

[BibT_eX]

[DOI]

Pradip Bose

S. Surya

IBM J. Res. Dev., 1995

Use of architectural simulation tools in education.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 1995 Workshop on Computer Architecture Education, 1995

1994

Architectural Performance Verification: PowerPC<sup>TM</sup> Processors.

[BibT_eX]

[DOI]

S. Surya

Pradip Bose

Jacob A. Abraham

Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

Architectural Timing Verification and Test for Super Scalar Processors.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the Digest of Papers: FTCS/24, 1994

1993

MIPS-Driven Early Design and Analysis of VLSI CPU Chips.

[BibT_eX]

[DOI]

Pradip Bose

John-David Wellman

Proceedings of the Sixth International Conference on VLSI Design, 1993

1992

Workload-Driven Floorplanning for MIPS Optimization.

[BibT_eX]

[DOI]

Pradip Bose

David LaPotin

Gopalakrishnan Vijayan

Sungho Kim

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1991

Early Performance Estimation of Super Scalar Machine Models.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1990

Synthesis of testable PLAs using adaptive heuristics for efficiency.

[BibT_eX]

[DOI]

Pradip Bose

Subir Bandyopadhyay

D. Dutta Majumder

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

1988

A Novel Technique for Efficient Parallel Implementation of a Classical Logic/Fault Simulation Problem.

[BibT_eX]

[DOI]

Pradip Bose

IEEE Trans. Computers, 1988

Interactive program improvement via EAVE: an expert adviser for vectorization.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 2nd international conference on Supercomputing, 1988

Heuristic Rule-Based Program Transformations for Enhanced Vectorization.

[BibT_eX]

Pradip Bose

Proceedings of the International Conference on Parallel Processing, 1988

Parallel logic/fault simulation of VLSI array logic.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988

Parallel Simulation and Test of VLSI Array Logic.

[BibT_eX]

[DOI]

Pradip Bose

Proceedings of the VLSI Algorithms and Architectures, 3rd Aegean Workshop on Computing, 1988

1986

Optimal Code Generation for Expressions on Super Scalar Machines.

[BibT_eX]

Pradip Bose

Proceedings of the Fall Joint Computer Conference, November 2-6, 1986, Dallas, Texas, USA, 1986

1984

Design of Instruction Set Architectures for Support of High-Level Languages .

[BibT_eX]

[DOI]

Pradip Bose

Edward S. Davidson

Proceedings of the 11th Annual Symposium on Computer Architecture, 1984

1983

Instruction Set Design for Support of High-Level Languages

[BibT_eX]

[DOI]

Pradip Bose

PhD thesis, 1983

1982

Test generation for programmable logic arrays.

[BibT_eX]

[DOI]

Pradip Bose

Jacob A. Abraham

Proceedings of the 19th Design Automation Conference, 1982

Systematically derived instruction sets for high-level language support.

[BibT_eX]

[DOI]

Pradip Bose

B. Ramakrishna Rau

Michael S. Schlansker

Proceedings of the 20th Annual Southeast Regional Conference, 1982

Pradip Bose

Awards

IEEE Fellow

Timeline

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