Chen-Yong Cher

According to our database, Chen-Yong Cher authored at least 42 papers between 2001 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2018

Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience).

Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

2017

System-Level Effects of Soft Errors in Uncore Components.

Hyungmin Cho, Eric Cheng, Thomas Shepherd, Chen-Yong Cher, Subhasish Mitra

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights.

Eric Cheng, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Keith A. Campbell, Deming Chen, Chen-Yong Cher, Hyungmin Cho, Binh Q. Le, Klas Lilja, Shahrzad Mirkhani, Kevin Skadron, Mircea Stan, Lukasz G. Szafaryn, Christos Vezyrtzis, Subhasish Mitra

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

BRAVO: Balanced Reliability-Aware Voltage Optimization.

Karthik Swaminathan, Nandhini Chandramoorthy, Chen-Yong Cher, Ramon Bertran, Alper Buyuktosunoglu, Pradip Bose

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016

Understanding error propagation in GPGPU applications.

Guanpeng Li, Karthik Pattabiraman, Chen-Yong Cher, Pradip Bose

Proceedings of the International Conference for High Performance Computing, 2016

Measurement-Driven Methodology for Evaluating Processor Heterogeneity Options for Power-Performance Efficiency.

William J. Song, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose

Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Clear: c̲ross-l̲ayer e̲xploration for a̲rchitecting r̲esilience combining hardware and software techniques to tolerate soft errors in processor cores.

Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

Active Memory Cube: A processing-in-memory architecture for exascale systems.

Ravi Nair, Samuel Antão, Carlo Bertolli, Pradip Bose, José R. Brunheroto, Tong Chen, Chen-Yong Cher, Carlos H. A. Costa, J. Doi, Constantinos Evangelinos, Bruce M. Fleischer, Thomas W. Fox, Diego S. Gallo, Leopold Grinberg, John A. Gunnels, Arpith C. Jacob, P. Jacob, Hans M. Jacobson, Tejas Karkhanis, C. Kim, Jaime H. Moreno, John K. O'Brien, Martin Ohmacht, Yoonho Park, Daniel A. Prener, Bryan S. Rosenburg, Kyung Dong Ryu, Olivier Sallenave, Mauricio J. Serrano, P. D. M. Siegl, Krishnan Sugavanam, Zehra Sura

IBM J. Res. Dev., 2015

Understanding the propagation of transient errors in HPC applications.

Rizwan A. Ashraf, Roberto Gioiosa, Gokcen Kestor, Ronald F. DeMara, Chen-Yong Cher, Pradip Bose

Proceedings of the International Conference for High Performance Computing, 2015

Experience report: An application-specific checkpointing technique for minimizing checkpoint corruption.

Guanpeng Li, Karthik Pattabiraman, Chen-Yong Cher, Pradip Bose

Proceedings of the 26th IEEE International Symposium on Software Reliability Engineering, 2015

Efficient soft error vulnerability estimation of complex designs.

Shahrzad Mirkhani, Subhasish Mitra, Chen-Yong Cher, Jacob A. Abraham

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Understanding soft errors in uncore components.

Hyungmin Cho, Chen-Yong Cher, Thomas Shepherd, Subhasish Mitra

Proceedings of the 52nd Annual Design Automation Conference, 2015

2014

The resilience wall: Cross-layer solution strategies.

Subhasish Mitra, Pradip Bose, Eric Cheng, Chen-Yong Cher, Hyungmin Cho, Rajiv V. Joshi, Young Moon Kim, Charles R. Lefurgy, Yanjing Li, Kenneth P. Rodbell, Kevin Skadron, James H. Stathis, Lukasz G. Szafaryn

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

A System Software Approach to Proactive Memory-Error Avoidance.

Carlos H. A. Costa, Yoonho Park, Bryan S. Rosenburg, Chen-Yong Cher, Kyung Dong Ryu

Proceedings of the International Conference for High Performance Computing, 2014

Understanding Soft Error Resiliency of Blue Gene/Q Compute Chip through Hardware Proton Irradiation and Software Fault Injection.

Chen-Yong Cher, Meeta Sharma Gupta, Pradip Bose, K. Paul Muller

Proceedings of the International Conference for High Performance Computing, 2014

Soft error resiliency characterization and improvement on IBM BlueGene/Q processor using accelerated proton irradiation.

Chen-Yong Cher, K. Paul Muller, Ruud A. Haring, David L. Satterfield, Thomas E. Musta, Thomas Gooding, Kristan D. Davis, Marc Boris Dombrowa, Gerard V. Kopcsay, Robert M. Senger, Yutaka Sugawara, Krishnan Sugavanam

Proceedings of the 2014 International Test Conference, 2014

Cross layer resiliency in real world.

Vikas Chandra, Subhasish Mitra, Chen-Yong Cher, Silvia Melitta Müller

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Soft Error Resiliency Characterization on IBM BlueGene/Q Processor.

Chen-Yong Cher, K. Paul Muller, Ruud A. Haring, David L. Satterfield, Thomas E. Musta, Thomas Gooding, Kristan D. Davis, Marc Boris Dombrowa, Gerard V. Kopcsay, Robert M. Senger, Yutaka Sugawara, Krishnan Sugavanam

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

SMT Malleability in IBM POWER5 and POWER6 Processors.

Alessandro Morari, Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero

IEEE Trans. Computers, 2013

Design for low power and power management in IBM Blue Gene/Q.

Krishnan Sugavanam, Chen-Yong Cher, John A. Gunnels, Ruud A. Haring, Philip Heidelberger, Hans M. Jacobson, Moyra K. McManus, D. P. Paulsen, David L. Satterfield, Yutaka Sugawara, Robert Walkup

IBM J. Res. Dev., 2013

Innovative practices session 7C: Self-calibration & trimming.

Chen-Yong Cher, Yiorgos Makris, C. Thibeault, Alan J. Drake

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Innovative practices session 11C: Resilience.

Chen-Yong Cher, Mohan J. Kumar

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Quantitative evaluation of soft error injection techniques for robust system design.

Hyungmin Cho, Shahrzad Mirkhani, Chen-Yong Cher, Jacob A. Abraham, Subhasish Mitra

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

An information-theoretic framework for optimal temperature sensor allocation and full-chip thermal monitoring.

Huapeng Zhou, Xin Li, Chen-Yong Cher, Eren Kursun, Haifeng Qian, Shi-Chune Yao

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Exploring the effects of on-chip thermal variation on high-performance multicore architectures.

Chen-Yong Cher, Eren Kursun

ACM Trans. Archit. Code Optim., 2011

Characterizing Power and Temperature Behavior of POWER6-Based System.

Víctor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero, Carlos Boneti, Eren Kursun, Chen-Yong Cher, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose

IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

2010

Trends and techniques for energy efficient architectures.

Víctor Jiménez, Roberto Gioiosa, Eren Kursun, Francisco J. Cazorla, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

A wire-speed power^TM processor: 2.3GHz 45nm SOI with 16 cores and 64 threads.

Charles L. Johnson, David H. Allen, Jeffrey D. Brown, Steve Vanderwiel, Russ Hoover, Heather D. Achilles, Chen-Yong Cher, George A. May, Hubertus Franke, Jimi Xenidis, Claude Basso

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Power-efficient, reliable microprocessor architectures: modeling and design methods.

Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor V. Zyuban

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Performance and power evaluation of an in-line accelerator.

Alejandro Rico, Jeff H. Derby, Robert K. Montoye, Timothy H. Heil, Chen-Yong Cher, Pradip Bose

Proceedings of the 7th Conference on Computing Frontiers, 2010

Power and thermal characterization of POWER6 system.

Víctor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero, Carlos Boneti, Eren Kursun, Chen-Yong Cher, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009

Temperature Variation Characterization and Thermal Management of Multicore Architectures.

Eren Kursun, Chen-Yong Cher

IEEE Micro, 2009

2008

Cell GC: using the cell synergistic processor as a garbage collection coprocessor.

Chen-Yong Cher, Michael Gschwind

Proceedings of the 4th International Conference on Virtual Execution Environments, 2008

Software-Controlled Priority Characterization of POWER5 Processor.

Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher, Mateo Valero

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

Variation-aware thermal characterization and management of multi-core architectures.

Eren Kursun, Chen-Yong Cher

Proceedings of the 26th International Conference on Computer Design, 2008

2007

Thermal-aware task scheduling at the system software level.

Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, Hendrik F. Hamann, Alan J. Weger, Pradip Bose

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

2006

An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget.

Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, Margaret Martonosi

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?.

Chen-Yong Cher, Il Park, T. N. Vijaykumar

Proceedings of the Architecture of Computing Systems, 2006

2005

Combined circuit and architectural level variable supply-voltage scaling for low power.

Hai Li, Chen-Yong Cher, Kaushik Roy, T. N. Vijaykumar

IEEE Trans. Very Large Scale Integr. Syst., 2005

2004

Software prefetching for mark-sweep garbage collection: hardware analysis and software redesign.

Chen-Yong Cher, Antony L. Hosking, T. N. Vijaykumar

Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004

2003

VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power.

Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik Roy

Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

2001

Skipper: a microarchitecture for exploiting control-flow independence.

Chen-Yong Cher, T. N. Vijaykumar

Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001