Zheng Qiu

Orcid: 0000-0002-3797-2749

According to our database1, Zheng Qiu authored at least 13 papers between 2014 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Plug-and-Play Optimization for 3D Gaussian Splatting Compression: Distribution Regularization, Probabilistic Pruning and Detail Compensation.
Proceedings of the Fortieth AAAI Conference on Artificial Intelligence, 2026

2025
Active Constraint Learning in High Dimensions from Demonstrations.
CoRR, December, 2025

Power-efficient SAR ADC with noise-reduction scheme based on kT/C noise cancellation and adaptive tracking averaging.
Microelectron. J., 2025

2024
Development and validation of an interpretable machine learning for mortality prediction in patients with sepsis.
Frontiers Artif. Intell., 2024

MR-Conditional Robotic Actuation of Concentric Tendon-Driven Cardiac Catheters.
Proceedings of the International Symposium on Medical Robotics, 2024

Transformer-Based Virtual Microphone Estimator.
Proceedings of the IEEE International Conference on Signal Processing, 2024

Unrestricted Global Phase Bias-Aware Single-Channel Speech Enhancement with Conformer-Based Metric Gan.
Proceedings of the IEEE International Conference on Acoustics, 2024

Light Gated Multi Mini-Patch Extractor for Audio Classification.
Proceedings of the IEEE International Conference on Acoustics, 2024

2023
An offset and gain error calibration method in high-precision SAR ADCs.
Microelectron. J., September, 2023

2021
A 1 GS/s 10bit SAR ADC with background calibration in 28 nm CMOS.
Microelectron. J., 2021

2020
Dual Vote Confirmation based Consensus Design for Blockchain integrated IoT.
Proceedings of the NOMS 2020, 2020

2015
A 6-to-10-Bit 0.5 V-to-0.9 V Reconfigurable 2 MS/s Power Scalable SAR ADC in 0.18 µm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
A 2.67 fJ/c.-s. 27.8 kS/s 0.35 V 10-bit successive approximation register analogue-to-digital converter in 65 nm complementary metal oxide semiconductor.
IET Circuits Devices Syst., 2014


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