Zhenghao Lu

Orcid: 0000-0002-3913-3842

According to our database1, Zhenghao Lu authored at least 19 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A Two-Step Time-to-Digital Converter With 5.6-ps Resolution and 1-4255-μs Measurement Range.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2024

Column-wise Garbling, and How to Go Beyond the Linear Model.
IACR Cryptol. ePrint Arch., 2024

2023
Design and Implementation of an Event-Driven Smart Sensor Node for Wireless Monitoring Systems.
Sensors, December, 2023

A Linear-in-Decibel Automatic Gain Control Amplifier With Dual Mode Continuous Gain Tuning.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023

Large Scale Training of Graph Neural Networks for Optimal Markov-Chain Partitioning Using the Kemeny Constant.
CoRR, 2023

Concurrent Multiband CMOS Low Noise Amplifier Design for Internet of Things Applications.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2021
A digital background calibration scheme for non-linearity of SAR ADC using back-propagation algorithm.
Microelectron. J., 2021

2020
A data-dependent energy reduction algorithm for SAR ADC using self-adaptive window.
Microelectron. J., 2020

An Ultra-low Power Relaxation Oscillator with Novel Ultra-low Leakage Switch and Temperature-compensated Resistor.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2019
A Wideband dB-Linear VGA With Temperature Compensation and Active Load.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2016
A 11.2 mW 48-62 GHz Low Noise Amplifier in 65 nm CMOS Technology.
Circuits Syst. Signal Process., 2016

2013
A 12-mW 40-60-GHz 0.18- $\mu {\hbox {m}}$ BiCMOS Oscillator-Less Self-Demodulator for Short-Range Software-Defined Transceivers.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2013

Reduced complexity implementation of quasi-cyclic LDPC decoders by parity-check matrix reordering.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012
A 57∼66GHz CMOS voltage-controlled oscillator using tunable differential inductor.
Proceedings of the International SoC Design Conference, 2012

2011
A 60GHz BiCMOS self-demodulator with injection locked oscillator.
Proceedings of the International SoC Design Conference, 2011

Parallel structure of GF (2<sup>14</sup>) and GF (2<sup>16</sup>) multipliers based on composite finite fields.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
Design of a CMOS Broadband Transimpedance Amplifier With Active Feedback.
IEEE Trans. Very Large Scale Integr. Syst., 2010

2007
Broad-Band Design Techniques for Transimpedance Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

2006
A novel CMOS low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band wireless receivers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006


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