Li Zhang

Orcid: 0000-0002-8951-4969

Affiliations:

Zhejiang University, Hangzhou, China
Huazhong University of Science and Technology, School of Optical and Electronic Information, Wuhan, China (PhD 2018)

According to our database¹, Li Zhang authored at least 33 papers between 2013 and 2026.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

Book In proceedings Article PhD thesis Dataset Other

Bibliography

2026

Machine Learning-Assisted VCD Processing for Accelerated Dynamic Voltage Drop Analysis.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., July, 2026

ZlibBoost: An Efficient and Flexible Open-Source Framework for Standard Cell Characterization.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., July, 2026

DEMUNet: Dual Encoder Mamba U-Net for Hyperspectral Image Classification.

[BibT_eX]

[DOI]

Xiandai Cui

Li Zhang

IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2026

A wideband low-phase-noise VCO with low-coupled 8-shaped inductor.

[BibT_eX]

[DOI]

Microelectron. J., 2026

2025

A 17.8-20.6 GHz Low Phase Noise VCO with Low-Coupled 8-Shaped Transformer.

[BibT_eX]

[DOI]

Circuits Syst. Signal Process., October, 2025

PACE: A Piece-Wise Approximate Floating-Point Divider with Runtime Configurability and High Energy Efficiency.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., March, 2025

Dynamic Multi-scale Feature Integration Network for unsupervised MR-CT synthesis.

[BibT_eX]

[DOI]

Neural Networks, 2025

Design and analysis of a ring-VCO based low jitter PLL.

[BibT_eX]

[DOI]

Microelectron. J., 2025

A Synchronous Buck Converter With a Wide Input Voltage Range Using Simulated Peak Current Mode Control.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2025

A Four-Core Dual-Mode VCO With a Frequency Range of 19.92-40.17 GHz Using Current Reuse and Transconductance Unit Switching Techniques.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2025

An Efficient 2.4 GHz Polar Class-G Switched-Capacitor Power Amplifier With a Five-Transistors Voltage-Tolerant Switch.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2025

Semi-supervised GAN for enhancing electrocardiogram time series diagnostics.

[BibT_eX]

[DOI]

Biomed. Signal Process. Control., 2025

Algorithm-Hardware Co-Design of a Unified Accelerator for Non-Linear Functions in Transformers.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference, 2025

Invited Paper: Boosting Standard Cell Library Characterization with Machine Learning.

[BibT_eX]

[DOI]

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

An Agile Framework for Efficient LLM Accelerator Development and Model Inference.

[BibT_eX]

[DOI]

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

PACE: A Piece-Wise Approximate and Configurable Floating - Point Divider for Energy - Efficient Computing.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

An efficient Industrial Internet of Things video data processing system for protocol identification and quality enhancement.

[BibT_eX]

[DOI]

Lvcheng Chen

Liangwei Liu

Li Zhang

IET Cyper-Phys. Syst.: Theory & Appl., June, 2023

A DVFS Design and Simulation Framework Using Machine Learning Models.

[BibT_eX]

[DOI]

IEEE Des. Test, February, 2023

A fine-grained mixed precision DNN accelerator using a two-stage big-little core RISC-V MCU.

[BibT_eX]

[DOI]

Integr., 2023

2022

Data-Driven Deep Supervision for Skin Lesion Classification.

[BibT_eX]

[DOI]

Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2022, 2022

2021

A Reconfigurable Multiplier for Signed Multiplications with Asymmetric Bit-Widths.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2021

Regularization-Free Structural Pruning for GPU Inference Acceleration.

[BibT_eX]

[DOI]

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

A Physical-Aware Framework for Memory Network Design Space Exploration.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

FeCAM: A Universal Compact Digital and Analog Content Addressable Memory Using Ferroelectric.

[BibT_eX]

[DOI]

CoRR, 2020

Analog Content Addressable Memory using Ferroelectric: A Case Study of Search-in-Memory.

[BibT_eX]

[DOI]

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

An Efficient and Flexible Learning Framework for Dynamic Power and Thermal Co-Management.

[BibT_eX]

[DOI]

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

A Convolutional Neural Network Accelerator Architecture with Fine-Granular Mixed Precision Configurability.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Reconfigurable Approximate Multiplier for Quantized CNN Applications.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

Optimal design of a low-power, phase-switching modulator for implantable medical applications.

[BibT_eX]

[DOI]

Integr., 2019

2018

Scalable and Parameterized Architecture for Efficient Stream Mining.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

2017

Analysis and measurement of misalignment effect in inductive-coupling wireless inter-chip connection.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2017

A single phase modulation for pulse-based inductive-coupling connection in 3D stacked chip.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2017

2013

Analysis inductively coupling wireless connection in 3D package.

[BibT_eX]

[DOI]

Proceedings of the IEEE 10th International Conference on ASIC, 2013

Li Zhang

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Bibliography

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