Zhuolun He

Orcid: 0009-0009-4909-6588

According to our database1, Zhuolun He authored at least 21 papers between 2017 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
IncreMacro: Incremental Macro Placement Refinement.
Proceedings of the 2024 International Symposium on Physical Design, 2024

Large Language Models for EDA: Future or Mirage?
Proceedings of the 2024 International Symposium on Physical Design, 2024

Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs.
Proceedings of the 2024 International Symposium on Physical Design, 2024

2023
Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

Efficient Arithmetic Block Identification With Graph Learning and Network-Flow.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

ChatEDA: A Large Language Model Powered Autonomous Agent for EDA.
Proceedings of the 5th ACM/IEEE Workshop on Machine Learning for CAD, 2023

AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Invited Paper: Heterogeneous Acceleration for Design Rule Checking.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Efficient Design Rule Checking with GPU Acceleration.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

AutoGraph: Optimizing DNN Computation Graph for Parallel GPU Kernel Execution.
Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023

2022
X-Check: CPU-Accelerated Design Rule Checking via Parallel Sweepline Algorithms.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Functionality matters in netlist representation learning.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Graph Learning-Based Arithmetic Block Identification.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Physical Synthesis for Advanced Neural Network Processors.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
Deep Model Compression and Inference Speedup of Sum-Product Networks on Tensor Trains.
IEEE Trans. Neural Networks Learn. Syst., 2020

HOTCAKE: Higher Order Tucker Articulated Kernels for Deeper CNN Compression.
CoRR, 2020

Understanding Graphs in EDA: From Shallow to Deep Learning.
Proceedings of the ISPD 2020: International Symposium on Physical Design, Taipei, Taiwan, March 29, 2020

Learn to Floorplan through Acquisition of Effective Local Search Heuristics.
Proceedings of the 38th IEEE International Conference on Computer Design, 2020

2018
FPGA-Based Real-Time Super-Resolution System for Ultra High Definition Videos.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017
FPGA Acceleration for Computational Glass-Free Displays.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017


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