Yuzhe Ma

Zhijin Zhou

Proceedings of the Eleventh International Conference on Learning Representations, 2023

Efficient Design Rule Checking with GPU Acceleration.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

RL-MUL: Multiplier Design Optimization with Deep Reinforcement Learning.

[BibT_eX]

[DOI]

Dongsheng Zuo

Yikang Ouyang

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Physics-Informed Optical Kernel Regression Using Complex-valued Neural Fields.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Adaptive Layout Decomposition With Graph Embedding Neural Networks.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Neural-ILT 2.0: Migrating ILT to Domain-Specific and Multitask-Enabled Neural Network.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

High-Speed Adder Design Space Exploration via Graph Neural Processes.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

DAMO: Deep Agile Mask Optimization for Full-Chip Scale.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Rethinking Graph Neural Networks for the Graph Coloring Problem.

[BibT_eX]

[DOI]

CoRR, 2022

Game Redesign in No-regret Game Playing.

[BibT_eX]

[DOI]

Young Wu

Xiaojin Zhu

Proceedings of the Thirty-First International Joint Conference on Artificial Intelligence, 2022

AdaOPC: A Self-Adaptive Mask Optimization Framework for Real Design Patterns.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

X-Check: CPU-Accelerated Design Rule Checking via Parallel Sweepline Algorithms.

[BibT_eX]

[DOI]

Zhuolun He

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2021

Machine Learning for Electronic Design Automation: A Survey.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2021

OpenMPL: An Open-Source Layout Decomposer.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

VLSI mask optimization: From shallow to deep learning.

[BibT_eX]

[DOI]

Integr., 2021

BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis.

[BibT_eX]

[DOI]

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

A New Missing Data Generation Method Based on An Improved DCGAN With Application to RUL Prediction.

[BibT_eX]

[DOI]

Proceedings of the CAA Symposium on Fault Detection, 2021

Sneak circuit analysis considering component performance degradation under digital twin model.

[BibT_eX]

[DOI]

Proceedings of the CAA Symposium on Fault Detection, 2021

TreeNet: Deep Point Cloud Embedding for Routing Tree Construction.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Physical Synthesis for Advanced Neural Network Processors.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

The Sample Complexity of Teaching by Reinforcement on Q-Learning.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021

Sequential Attacks on Kalman Filter-based Forward Collision Warning Systems.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021

2020

Adversarial Perturbation Attacks on ML-based CAD: A Case Study on CNN-based Lithographic Hotspot Detection.

[BibT_eX]

[DOI]

Ramesh Karri

Siddharth Garg

ACM Trans. Design Autom. Electr. Syst., 2020

GAN-OPC: Mask Optimization With Lithography-Guided Generative Adversarial Nets.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

SRAF Insertion via Supervised Dictionary Learning.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Using Machine Teaching to Investigate Human Assumptions when Teaching Reinforcement Learners.

[BibT_eX]

[DOI]

CoRR, 2020

The Teaching Dimension of Q-learning.

[BibT_eX]

[DOI]

CoRR, 2020

NHPP Testability Growth Model Considering Testability Growth Effort, Rectifying Delay, and Imperfect Correction.

[BibT_eX]

[DOI]

IEEE Access, 2020

Task-agnostic Exploration in Reinforcement Learning.

[BibT_eX]

[DOI]

Xuezhou Zhang

Adish Singla

Proceedings of the Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, 2020

Understanding Graphs in EDA: From Shallow to Deep Learning.

[BibT_eX]

[DOI]

Proceedings of the ISPD 2020: International Symposium on Physical Design, Taipei, Taiwan, March 29, 2020

Adaptive Reward-Poisoning Attacks against Reinforcement Learning.

[BibT_eX]

[DOI]

Proceedings of the 37th International Conference on Machine Learning, 2020

Learn to Floorplan through Acquisition of Effective Local Search Heuristics.

[BibT_eX]

[DOI]

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

Neural-ILT: Migrating ILT to Neural Networks for Mask Printability and Complexity Co-optimization.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

DAMO: Deep Agile Mask Optimization for Full Chip Scale.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Adaptive Layout Decomposition with Graph Embedding Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Layout Hotspot Detection With Feature Tensor Generation and Deep Biased Learning.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Cross-Layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Recent advances in convolutional neural network acceleration.

[BibT_eX]

[DOI]

Neurocomputing, 2019

CAD Tool Design Space Exploration via Bayesian Optimization.

[BibT_eX]

[DOI]

Ziyang Yu

CoRR, 2019

Policy Poisoning in Batch Reinforcement Learning and Control.

[BibT_eX]

[DOI]

CoRR, 2019

Are Adversarial Perturbations a Showstopper for ML-Based CAD? A Case Study on CNN-Based Lithographic Hotspot Detection.

[BibT_eX]

[DOI]

Ramesh Karri

Siddharth Garg

CoRR, 2019

Policy Poisoning in Batch Reinforcement Learning and Control.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019

Collaborative and Privacy-Preserving Machine Teaching via Consensus Optimization.

[BibT_eX]

[DOI]

Proceedings of the International Joint Conference on Neural Networks, 2019

Data Poisoning against Differentially-Private Learners: Attacks and Defenses.

[BibT_eX]

[DOI]

Xiaojin Zhu

Justin Hsu

Proceedings of the Twenty-Eighth International Joint Conference on Artificial Intelligence, 2019

A Unified Approximation Framework for Compressing and Accelerating Deep Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the 31st IEEE International Conference on Tools with Artificial Intelligence, 2019

High Performance Graph Convolutional Networks with Applications in Testability Analysis.

[BibT_eX]

[DOI]

Karthikeyan Natarajan

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

SRAF insertion via supervised dictionary learning.

[BibT_eX]

[DOI]

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

OpenMPL: An Open Source Layout Decomposer: Invited Paper.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018

Neighbourhood-preserving dimension reduction via localised multidimensional scaling.

[BibT_eX]

[DOI]

Theor. Comput. Sci., 2018

SD-PUF: Spliced Digital Physical Unclonable Function.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

A Unified Approximation Framework for Deep Neural Networks.

[BibT_eX]

[DOI]

CoRR, 2018

Adversarial Attacks on Stochastic Bandits.

[BibT_eX]

[DOI]

Proceedings of the Advances in Neural Information Processing Systems 31: Annual Conference on Neural Information Processing Systems 2018, 2018

Training Set Camouflage.

[BibT_eX]

[DOI]

Proceedings of the Decision and Game Theory for Security - 9th International Conference, 2018

Data Poisoning Attacks in Contextual Bandits.

[BibT_eX]

[DOI]

Proceedings of the Decision and Game Theory for Security - 9th International Conference, 2018

GAN-OPC: mask optimization with lithography-guided generative adversarial nets.

[BibT_eX]

[DOI]

Proceedings of the 55th Annual Design Automation Conference, 2018

Teacher Improves Learning by Selecting a Training Subset.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Artificial Intelligence and Statistics, 2018

2017

Methodologies for layout decomposition and mask optimization: A systematic review.

[BibT_eX]

[DOI]

Xuan Zeng

Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

A learning bridge from architectural synthesis to physical design for exploring power efficient high-performance adders.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

Clock-aware ultrascale FPGA placement with machine learning routability prediction: (Invited paper).

[BibT_eX]

[DOI]

Chak-Wa Pui

Gengjie Chen