Alfonso Sánchez-Macián

Orcid: 0000-0002-2220-0594

According to our database1, Alfonso Sánchez-Macián authored at least 43 papers between 2006 and 2024.

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Bibliography

2024
Deepfake Detection and the Impact of Limited Computing Capabilities.
CoRR, 2024

2023
Attacking the Privacy of Approximate Membership Check Filters by Positive Concentration.
IEEE Trans. Computers, May, 2023

On the Privacy of Counting Bloom Filters.
IEEE Trans. Dependable Secur. Comput., 2023

On the Privacy of Counting Bloom Filters Under a Black-Box Attacker.
IEEE Trans. Dependable Secur. Comput., 2023

Threat Trekker: An Approach to Cyber Threat Hunting.
CoRR, 2023

2022
Attacking Adaptive Cuckoo Filters: Too Much Adaptation Can Kill You.
IEEE Trans. Netw. Serv. Manag., December, 2022

An analysis of FPGA configuration memory SEU accumulation and a preventative scrubbing technique.
Microprocess. Microsystems, April, 2022

Adaptive One Memory Access Bloom Filters.
IEEE Trans. Netw. Serv. Manag., 2022

Design and implementation of efficient QCA full-adders using fault-tolerant majority gates.
J. Supercomput., 2022

Reducing the Impact of Defects in Quantum-Dot Cellular Automata (QCA) Approximate Adders at Nano Scale.
IEEE Trans. Emerg. Top. Comput., 2022

On the Security of the K Minimum Values (KMV) Sketch.
IEEE Trans. Dependable Secur. Comput., 2022

2021
Combined Symbol Error Correction and Spare Through-Silicon Vias for 3D Memories.
IEEE Trans. Emerg. Top. Comput., 2021

Decoding Algorithm for Quadruple-Error-Correcting Reed-Solomon Codes and Its Derived Architectures.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Fault Injection Emulation for Systems in FPGAs: Tools, Techniques and Methodology, a Tutorial.
Sensors, 2021

Low delay non-binary error correction codes based on Orthogonal Latin Squares.
Integr., 2021

Approximate Membership Query Filters with a False Positive Free Set.
CoRR, 2021

2020
An Algorithmic-Based Fault Detection Technique for the 1-D Discrete Cosine Transform.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Low-Latency and Low-Power Test-Vector Selector for Reed-Solomon's Low-Complexity Chase.
IEEE Trans. Circuits Syst., 2020

Two Behavioural Error Detection Techniques for the Cascaded Integrator-Comb Interpolation Filter Implemented on FPGA.
Circuits Syst. Signal Process., 2020

Radiation Hardened Digital Direct Synthesizer With CORDIC for Spaceborne Applications.
IEEE Access, 2020

Analyzing the impact of the Operating System on the Reliability of a RISC-V FPGA Implementation.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

Reduction of Parity Overhead in a Subset of Orthogonal Latin Square Codes.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019
Enhancing Instruction TLB Resilience to Soft Errors.
IEEE Trans. Computers, 2019

ACME: A Tool to Improve Configuration Memory Fault Injection in SRAM-Based FPGAs.
IEEE Access, 2019

2018
Modular fault tolerant processor architecture on a SoC for space.
Microelectron. Reliab., 2018

Seu and Sefi error detection and correction on a ddr3 memory system.
Microelectron. Reliab., 2018

2017
A Scheme to Reduce the Number of Parity Check Bits in Orthogonal Latin Square Codes.
IEEE Trans. Reliab., 2017

Single Event Transient Tolerant Bloom Filter Implementations.
IEEE Trans. Computers, 2017

Combined Modular Key and Data Error Protection for Content-Addressable Memories.
IEEE Trans. Computers, 2017

Comments on "Extend orthogonal Latin square codes for 32-bit data protection in memory applications" Microelectron. Reliab. 63 278-283 (2016).
Microelectron. Reliab., 2017

2016
Optimizing the Implementation of SEC-DAEC Codes in FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Combined SEU and SEFI Protection for Memories Using Orthogonal Latin Square Codes.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

2014
A Method to Extend Orthogonal Latin Square Codes.
IEEE Trans. Very Large Scale Integr. Syst., 2014

An experimental power profile of Energy Efficient Ethernet switches.
Comput. Commun., 2014

2012
Low Power embedded DRAM caches using BCH code partitioning.
Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

An energy consumption model for Energy Efficient Ethernet switches.
Proceedings of the 2012 International Conference on High Performance Computing & Simulation, 2012

2011
On the Impact of the TCP Acknowledgement Frequency on Energy Efficient Ethernet Performance.
Proceedings of the NETWORKING 2011 Workshops - International IFIP TC 6 Workshops, PE-CRN, 2011

Using Coordinated Transmission with Energy Efficient Ethernet.
Proceedings of the NETWORKING 2011, 2011

2008
A system for monitoring, assessing and certifying Quality of Service in telematic services.
Knowl. Based Syst., 2008

2007
Extending SWRL to Enhance Mathematical Support.
Proceedings of the Web Reasoning and Rule Systems, First International Conference, 2007

Dynamic Service Provisioning Using GRIA SLAs.
Proceedings of the Service-Oriented Computing, 2007

2006
Towards Unified QoS/SLA Ontologies.
Proceedings of the 2006 IEEE Services Computing Workshops (SCW 2006), 2006

Ontology-Based Policy Refinement Using SWRL Rules for Management Information Definitions in OWL.
Proceedings of the Large Scale Management of Distributed Systems, 2006


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