Amogh Agrawal

Orcid: 0000-0001-9999-9085

According to our database1, Amogh Agrawal authored at least 32 papers between 2014 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
HyperX: A Hybrid RRAM-SRAM partitioned system for error recovery in memristive Xbars.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Embracing Stochasticity to Enable Neuromorphic Computing at the Edge.
IEEE Des. Test, 2021

IMPULSE: A 65nm Digital Compute-in-Memory Macro with Fused Weights and Membrane Potential for Spike-based Sequential Learning Tasks.
CoRR, 2021

Enabling Robust SOT-MTJ Crossbars for Machine Learning using Sparsity-Aware Device-Circuit Co-design.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

Exploring Spike-Based Learning for Neuromorphic Computing: Prospects and Perspectives.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Revisiting Stochastic Computing in the Era of Nanoscale Nonvolatile Technologies.
IEEE Trans. Very Large Scale Integr. Syst., 2020

i-SRAM: Interleaved Wordlines for Vector Boolean Operations Using SRAMs.
IEEE Trans. Circuits Syst., 2020

Functional Read Enabling In-Memory Computations in 1Transistor - 1Resistor Memory Arrays.
IEEE Trans. Circuits Syst., 2020

IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Resistive Crossbars as Approximate Hardware Building Blocks for Machine Learning: Opportunities and Challenges.
Proc. IEEE, 2020

Circuits and Architectures for In-Memory Computing-Based Machine Learning Accelerators.
IEEE Micro, 2020

Erratum to "CASH-RAM: Enabling In-Memory Computations for Edge Inference Using Charge Accumulation and Sharing in Standard 8T-SRAM Arrays".
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020

CASH-RAM: Enabling In-Memory Computations for Edge Inference Using Charge Accumulation and Sharing in Standard 8T-SRAM Arrays.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020

IMAC: In-memory multi-bit Multiplication andACcumulation in 6T SRAM Array.
CoRR, 2020

RAMANN: in-SRAM differentiable memory computations for memory-augmented neural networks.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

In-Memory Computing in Emerging Memory Technologies for Machine Learning: An Overview.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
8T SRAM Cell as a Multibit Dot-Product Engine for Beyond Von Neumann Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

SPARE: Spiking Neural Network Acceleration Using ROM-Embedded RAMs as In-Memory-Computation Primitives.
IEEE Trans. Computers, 2019

X-CHANGR: Changing Memristive Crossbar Mapping for Mitigating Line-Resistance Induced Accuracy Degradation in Deep Neural Networks.
CoRR, 2019

On Robustness of Spin-Orbit-Torque Based Stochastic Sigmoid Neurons for Spiking Neural Networks.
Proceedings of the International Joint Conference on Neural Networks, 2019

Digital and Analog-Mixed-Signal In-Memory Processing in CMOS SRAM.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

2018
X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays.
CoRR, 2018

Proposal for a Low Voltage Analog-to-Digital Converter using Voltage Controlled Stochastic Switching of Low Barrier Nanomagnets.
CoRR, 2018

8T SRAM Cell as a Multi-bit Dot Product Engine for Beyond von-Neumann Computing.
CoRR, 2018

RECache: ROM-Embedded 8-Transistor SRAM Caches for Efficient Neural Computing.
Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

2017
X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories.
CoRR, 2017

SPARE: Spiking Networks Acceleration Using CMOS ROM-Embedded RAM as an In-Memory-Computation Primitive.
CoRR, 2017

Proposal for a Leaky Integrate Fire Spiking Neuron Using Voltage Driven Domain Wall Motion.
CoRR, 2017

2014
Cuffless BP measurement using a correlation study of pulse transient time and heart rate.
Proceedings of the 2014 International Conference on Advances in Computing, 2014


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