Sourjya Roy
Orcid: 0000-0002-6864-7738
According to our database1,
Sourjya Roy authored at least 13 papers
between 2016 and 2026.
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Bibliography
2026
Softprox: A Post-Finetuning Methodology to Mitigate Softmax Bottlenecks in Transformer Workloads.
IEEE Trans. Circuits Syst. Artif. Intell., April, 2026
2025
KV-CAR: KV Cache Compression using Autoencoders and KV Reuse in Large Language Models.
CoRR, December, 2025
CoRR, November, 2025
2023
2022
IEEE Trans. Very Large Scale Integr. Syst., 2022
2021
IEEE Trans. Very Large Scale Integr. Syst., 2021
PIM-DRAM: Accelerating Machine Learning Workloads Using Processing in Commodity DRAM.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
Resistive Crossbars as Approximate Hardware Building Blocks for Machine Learning: Opportunities and Challenges.
Proc. IEEE, 2020
Gradual Channel Pruning While Training Using Feature Relevance Scores for Convolutional Neural Networks.
IEEE Access, 2020
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020
2017
Spike timing dependent plasticity based enhanced self-learning for efficient pattern recognition in spiking neural networks.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017
2016
Proposal for a Leaky-Integrate-Fire Spiking Neuron based on Magneto-Electric Switching of Ferro-magnets.
CoRR, 2016