Mustafa Fayez Ali

Orcid: 0000-0002-4452-6464

Affiliations:
  • Purdue University, School of Electrical and Computer Engineering, West Lafayette, IN, USA
  • MTC, Cairo, Egypt


According to our database1, Mustafa Fayez Ali authored at least 20 papers between 2016 and 2023.

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Bibliography

2023
WWW: What, When, Where to Compute-in-Memory.
CoRR, 2023

A 65 nm 1.4-6.7 TOPS/W Adaptive-SNR Sparsity-Aware CIM Core with Load Balancing Support for DL workloads.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022
Compute-in-Memory Technologies and Architectures for Deep Learning Workloads.
IEEE Trans. Very Large Scale Integr. Syst., 2022

LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update.
IEEE Trans. Computers, 2022

2021
PIM-DRAM: Accelerating Machine Learning Workloads Using Processing in Commodity DRAM.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021

IMPULSE: A 65nm Digital Compute-in-Memory Macro with Fused Weights and Membrane Potential for Spike-based Sequential Learning Tasks.
CoRR, 2021

Design Tools for Resistive Crossbar based Machine Learning Accelerators.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
i-SRAM: Interleaved Wordlines for Vector Boolean Operations Using SRAMs.
IEEE Trans. Circuits Syst., 2020

In-Memory Low-Cost Bit-Serial Addition Using Commodity DRAM Technology.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Dynamic Read Current Sensing With Amplified Bit-Line Voltage for STT-MRAMs.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

Resistive Crossbars as Approximate Hardware Building Blocks for Machine Learning: Opportunities and Challenges.
Proc. IEEE, 2020

Circuits and Architectures for In-Memory Computing-Based Machine Learning Accelerators.
IEEE Micro, 2020

IMAC: In-memory multi-bit Multiplication andACcumulation in 6T SRAM Array.
CoRR, 2020

RAMANN: in-SRAM differentiable memory computations for memory-augmented neural networks.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

GENIEx: A Generalized Approach to Emulating Non-Ideality in Memristive Xbars using Neural Networks.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

In-Memory Computing in Emerging Memory Technologies for Machine Learning: An Overview.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Digital and Analog-Mixed-Signal In-Memory Processing in CMOS SRAM.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

2017
OTFTs compact models: analysis, comparison, and insights.
IET Circuits Devices Syst., 2017

2016
Design of OFET-based differential amplifier with cascaded diode-connected load.
Proceedings of the 28th International Conference on Microelectronics, 2016


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