Anmol Surhonne
Orcid: 0000-0002-4065-5007
  According to our database1,
  Anmol Surhonne
  authored at least 15 papers
  between 2017 and 2024.
  
  
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
  2024
EPIC-Q: Equivalent-Policy Invariant Comparison Enhanced Transfer Q-learning for Run-Time SoC Performance-Power Optimization.
    
  
    Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2024
    
  
QoS-Aware Dynamic Frequency Scaling for Mixed-Critical Systems based on Shielded Reinforcement Learning.
    
  
    Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024
    
  
    Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2024
    
  
  2023
    it Inf. Technol., August, 2023
    
  
LCT-TL : Learning Classifier Table (LCT) with Transfer Learning for runtime SoC performance-power optimization.
    
  
    Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023
    
  
LCT-DER: Learning Classifier Table with Dynamic-Sized Experience Replay for Run-time SoC Performance-Power Optimization.
    
  
    Proceedings of the Companion Proceedings of the Conference on Genetic and Evolutionary Computation, 2023
    
  
Information Processing Factory 2.0 - Self-awareness for Autonomous Collaborative Systems.
    
  
    Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
    
  
  2022
The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing.
    
  
    IEEE Trans. Emerg. Top. Comput., 2022
    
  
GAE-LCT: A Run-Time GA-Based Classifier Evolution Method for Hardware LCT Controlled SoC Performance-Power Optimization.
    
  
    Proceedings of the Architecture of Computing Systems - 35th International Conference, 2022
    
  
  2021
    ACM Trans. Embed. Comput. Syst., 2021
    
  
  2020
  2019
    CoRR, 2019
    
  
The information processing factory: a paradigm for life cycle management of dependable systems.
    
  
    Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019
    
  
  2018
    Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018
    
  
  2017
Automatic Test Pattern Generation for Multiple Missing Gate Faults in Reversible Circuits - Work in Progress Report.
    
  
    Proceedings of the Reversible Computation - 9th International Conference, 2017