Kasra Moazzemi

According to our database1, Kasra Moazzemi authored at least 13 papers between 2015 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


Reflecting on Self-Aware Systems-on-Chip.
Proceedings of the A Journey of Embedded and Cyber-Physical Systems, 2021

HESSLE-FREE: <u>He</u>terogeneou<u>s</u> <u>S</u>ystems <u>Le</u>veraging <u>F</u>uzzy Control for <u>R</u>untim<u>e</u> Resourc<u>e</u> Management.
ACM Trans. Embed. Comput. Syst., 2019

On-Chip Dynamic Resource Management.
Found. Trends Electron. Des. Autom., 2019

The information processing factory: a paradigm for life cycle management of dependable systems.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019

Design Methodology for Responsive and Rrobust MIMO Control of Heterogeneous Multicores.
IEEE Trans. Multi Scale Comput. Syst., 2018

On the feasibility of SISO control-theoretic DVFS for power capping in CMPs.
Microprocess. Microsystems, 2018

Trends in On-chip Dynamic Resource Management.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Design methodologies for enabling self-awareness in autonomous systems.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

SPECTR: Formal Supervisory Control and Coordination for Many-core Systems Resource Management.
Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems, 2018

Dependability evaluation of SISO control-theoretic power managers for processor architectures.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017

HAMEX: heterogeneous architecture and memory exploration framework.
Proceedings of the 2016 International Symposium on Rapid System Prototyping, 2016

Rapid, High-Level Performance Estimation for DSE Using Calibrated Weight Tables.
Proceedings of the System Level Design from HW/SW to Memory for Embedded Systems, 2015

Modeling and Analysis of SLDL-Captured NoC Abstractions.
Proceedings of the System Level Design from HW/SW to Memory for Embedded Systems, 2015