Anne Meixner

According to our database1, Anne Meixner authored at least 9 papers between 1991 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

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Bibliography

2013
An IDDQ BIST approach to characterize phase-locked loop parameters.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013

2012
Improving IO test and system evaluation via data sharing.
Proceedings of the 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012

2011
An industrial case study of analog fault modeling.
Proceedings of the 29th IEEE VLSI Test Symposium, 2011

2008
External Loopback Testing Experiences with High Speed Serial Interfaces.
Proceedings of the 2008 IEEE International Test Conference, 2008

2004
Testing Gbps Interfaces without a Gigahertz Tester.
IEEE Des. Test Comput., 2004

Elimination of Traditional Functional Testing of Interface Timings at Intel.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2004

Design considerations and DFT to enable testing of digital interfaces.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

1996
Weak Write Test Mode: An SRAM Cell Stability Design for Test Technique.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

1991
Fault Modeling for the Testing of Mixed Integrated Circuits.
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991


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