Arne Heittmann

According to our database, Arne Heittmann authored at least 26 papers between 2002 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Constructive community race: full-density spiking neural network model drives neuromorphic computing.

Johanna Senk, Anno Christopher Kurth, Steve B. Furber, Tobias Gemmeke, Bruno Golosio, Arne Heittmann, James C. Knight, Eric Müller, Tobias Noll, Thomas Nowotny, Gorka Peraza Coppola, Luca Peres, Oliver Rhodes, Andrew Rowley, Johannes Schemmel, Tim Stadtmann, Tom Tetzlaff, Gianmarco Tiddia, Sacha J. van Albada, Jose Villamar, Markus Diesmann

CoRR, May, 2025

Accelerating Hybrid XOR-CNF SAT Problems Natively with In-Memory Computing.

Haesol Im, Fabian Böhm, Giacomo Pedretti, Noriyuki Kushida, Moslem Noori, Elisabetta Valiante, Xiangyi Zhang, Chan-Woo Yang, Tinish Bhattacharya, Xia Sheng, Jim Ignowski, Arne Heittmann, John Paul Strachan, Masoud Mohseni, Raymond G. Beausoleil, Thomas Van Vaerenbergh, Ignacio Rozada

CoRR, April, 2025

Hardware-Compatible Single-Shot Feasible-Space Heuristics for Solving the Quadratic Assignment Problem.

Haesol Im, Chan-Woo Yang, Moslem Noori, Dmitrii Dobrynin, Elisabetta Valiante, Giacomo Pedretti, Arne Heittmann, Thomas Van Vaerenbergh, Masoud Mohseni, John Paul Strachan, Dmitri B. Strukov, Raymond G. Beausoleil, Ignacio Rozada

CoRR, March, 2025

Solving Boolean satisfiability problems with resistive content addressable memories.

Giacomo Pedretti, Fabian Böhm, Tinish Bhattacharya, Arne Heittmann, Xiangyi Zhang, Mohammad Hizzani, George Higgins Hutchinson, Dongseok Kwon, John Moon, Elisabetta Valiante, Ignacio Rozada, Catherine E. Graves, Jim Ignowski, Masoud Mohseni, John Paul Strachan, Dmitri B. Strukov, Raymond G. Beausoleil, Thomas Van Vaerenbergh

CoRR, January, 2025

Not All Neurons Are Equal: Enhancing Hopfield Networks for Solving Quadratized Higher-Order Combinatorial Optimization.

Mohammad Hizzani, Arne Heittmann, John Paul Strachan

Proceedings of the 23rd IEEE Interregional NEWCAS Conference, 2025

Impact of Variability Compensation on the Performance of an RRAM-based 3-SAT Solver.

Arne Heittmann, Mohammad Hizzani, John Paul Strachan

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024

Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines.

Mohammad Hizzani, Arne Heittmann, George Higgins Hutchinson, Dmitrii Dobrynin, Thomas Van Vaerenbergh, Tinish Bhattacharya, Adrien Renaudineau, Dmitri B. Strukov, John Paul Strachan

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Gradient matching of higher order combinatorial optimization in quadratic Ising machines.

Dmitrii Dobrynin, Mauricio Tedeschi, Arne Heittmann, John Paul Strachan

Proceedings of the IEEE International Conference on Rebooting Computing, 2024

2018

Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells.

Arne Heittmann, Tobias G. Noll

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Mixing circuit based on neural associative memories and nanoelectronic 1S1R cells.

Arne Heittmann, Tobias G. Noll

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

2014

Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuit.

Arne Heittmann, Tobias G. Noll

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Analysis of the area-delay performance of hybrid nanoelectronic memory cores used in field programmable gate arrays.

Qin Wang, Arne Heittmann, Tobias G. Noll

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

Variability evaluation of feedback circuits used in nanoelectronic Memristive/CMOS circuits.

Arne Heittmann, Tobias G. Noll

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

Modeling variability and irreproducibility of nanoelectronic resistive switches for circuit simulation.

Arne Heittmann, Tobias G. Noll

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

A Monte Carlo analysis of a write method used in passive nanoelectronic crossbars.

Arne Heittmann, Tobias G. Noll

Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

Limits of writing multivalued resistances in passive nanoelectronic crossbars used in neuromorphic circuits.

Arne Heittmann, Tobias G. Noll

Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

A hybrid CMOS/memristive nanoelectronic circuit for programming synaptic weights.

Arne Heittmann, Tobias G. Noll

Proceedings of the 20th European Symposium on Artificial Neural Networks, 2012

2011

Sensitivity of neuromorphic circuits using nanoelectronic resistive switches to pulse synchronization.

Arne Heittmann, Tobias G. Noll

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2007

Gabor-Like Image Filtering Using a Neural Microcircuit.

Christian Mayr, Arne Heittmann, René Schüffny

IEEE Trans. Neural Networks, 2007

2005

3D Chip Stack Technology Using Through-Chip Interconnects.

Peter Benkart, Alexander Kaiser, Andreas Munding, Markus Bschorr, Hans-Jörg Pfleiderer, Erhard Kohn, Arne Heittmann, Holger Huebner, Ulrich Ramacher

IEEE Des. Test Comput., 2005

2004

Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation.

Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny

Proceedings of the Image Processing: Algorithms and Systems III, 2004

Pulse coupled neural networks with adaptive synapses for image segmentation.

Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny

Proceedings of the ARCS 2004, 2004

2003

Ressourceneffiziente Architekturen neuronaler Assoziativspeicher.

Arne Heittmann

PhD thesis, 2003

Correlation-based feature detection using pulsed neural networks.

Arne Heittmann, Ulrich Ramacher

Proceedings of the NNSP 2003, 2003

2002

Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivity.

Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, D. Matolini, René Schüffny

Proceedings of the 12th IEEE Workshop on Neural Networks for Signal Processing, 2002

An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights.

Arne Heittmann, Ulrich Ramacher, Daniel Matolin, Jörg Schreiter, René Schüffny

Proceedings of the Artificial Neural Networks, 2002