Benjamin Tan

Orcid: 0000-0002-7642-3638

Affiliations:
  • University of Calgary, Canada
  • New York University, USA (former)
  • University of Auckland, New Zealand (former)


According to our database1, Benjamin Tan authored at least 59 papers between 2016 and 2024.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
An Investigation of Hardware Security Bug Characteristics in Open-Source Projects.
CoRR, 2024

Retrieval-Guided Reinforcement Learning for Boolean Circuit Minimization.
CoRR, 2024

2023
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction.
IEEE Trans. Very Large Scale Integr. Syst., October, 2023

High-Level Approaches to Hardware Security: A Tutorial.
ACM Trans. Embed. Comput. Syst., 2023

Hardware-Supported Patching of Security Bugs in Hardware IP Blocks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Bulls-Eye: Active Few-Shot Learning Guided Logic Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

AutoChip: Automating HDL Generation Using LLM Feedback.
CoRR, 2023

Theoretical Patchability Quantification for IP-Level Hardware Patching Designs.
CoRR, 2023

Are Emily and Greg Still More Employable than Lakisha and Jamal? Investigating Algorithmic Hiring Bias in the Era of ChatGPT.
CoRR, 2023

VeriGen: A Large Language Model for Verilog Code Generation.
CoRR, 2023

LLM-assisted Generation of Hardware Assertions.
CoRR, 2023

FLAG: Finding Line Anomalies (in code) with Generative AI.
CoRR, 2023

INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search.
CoRR, 2023

Fixing Hardware Security Bugs with Large Language Models.
CoRR, 2023

Advancing Smart Cities Through Novel Social Media Text Analysis: A Case Study of Calgary.
Proceedings of the IEEE Symposium Series on Computational Intelligence, 2023

Examining Zero-Shot Vulnerability Repair with Large Language Models.
Proceedings of the 44th IEEE Symposium on Security and Privacy, 2023

Distinguishing AI- and Human-Generated Code: A Case Study.
Proceedings of the 2023 Workshop on Software Supply Chain Offensive Research and Ecosystem Defenses, 2023

ConVERTS: Contrastively Learning Structurally InVariant Netlist Representations.
Proceedings of the 5th ACM/IEEE Workshop on Machine Learning for CAD, 2023

Benchmarking Large Language Models for Automated Verilog RTL Code Generation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Code and Dataset for "Examining Zero-Shot Vulnerability Repair with Large Language Models".
Dataset, March, 2022

Robust Deep Learning for IC Test Problems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Denial-of-Service Attacks on Learned Image Compression.
CoRR, 2022

Too Big to Fail? Active Few-Shot Learning Guided Logic Synthesis.
CoRR, 2022

Pop Quiz! Can a Large Language Model Help With Reverse Engineering?
CoRR, 2022

Innovation Practices Track: Security in Test and Test for Security.
Proceedings of the 40th IEEE VLSI Test Symposium, 2022

Asleep at the Keyboard? Assessing the Security of GitHub Copilot's Code Contributions.
Proceedings of the 43rd IEEE Symposium on Security and Privacy, 2022

Challenges and Opportunities for Hardware-Assisted Security Improvements in the Field.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Reconfigurable Logic for Hardware IP Protection: Opportunities and Challenges.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

ALICE: an automatic design flow for eFPGA redaction.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Designing ML-resilient locking at register-transfer level.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

High-level design methods for hardware security: is it the right choice? invited.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Copilot CWE Scenarios Dataset.
Dataset, August, 2021

Toward Hardware-Based IP Vulnerability Detection and Post-Deployment Patching in Systems-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Bias Busters: Robustifying DL-Based Lithographic Hotspot Detectors Against Backdooring Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Training Data Poisoning in ML-CAD: Backdooring DL-Based Lithographic Hotspot Detectors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Can OpenAI Codex and Other Large Language Models Help Us Fix Security Bugs?
CoRR, 2021

OpenABC-D: A Large-Scale Dataset For Machine Learning Guided Integrated Circuit Synthesis.
CoRR, 2021

An Empirical Cybersecurity Evaluation of GitHub Copilot's Code Contributions.
CoRR, 2021

Special Session: Machine Learning for Semiconductor Test and Reliability.
Proceedings of the 39th IEEE VLSI Test Symposium, 2021

Can We Trust Machine Learning for Electronic Design Automation?
Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

Exploring eFPGA-based Redaction for IP Protection.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Invited: Independent Verification and Validation of Security-Aware EDA Tools and IP.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

NNoculation: Catching BadNets in the Wild.
Proceedings of the AISec@CCS 2021: Proceedings of the 14th ACM Workshop on Artificial Intelligence and Security, 2021

Attacking a CNN-based Layout Hotspot Detector Using Group Gradient Method.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Subverting Privacy-Preserving GANs: Hiding Secrets in Sanitized Images.
Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021

2020
Adversarial Perturbation Attacks on ML-based CAD: A Case Study on CNN-based Lithographic Hotspot Detection.
ACM Trans. Design Autom. Electr. Syst., 2020

Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking.
CoRR, 2020

NNoculation: Broad Spectrum and Targeted Treatment of Backdoored DNNs.
CoRR, 2020

Challenges and New Directions for AI and Hardware Security.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

DAVE: Deriving Automatically Verilog from English.
Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

Explaining and Interpreting Machine Learning CAD Decisions: An IC Testing Case Study.
Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

Poisoning the (Data) Well in ML-Based CAD: A Case Study of Hiding Lithographic Hotspots.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Are Adversarial Perturbations a Showstopper for ML-Based CAD? A Case Study on CNN-Based Lithographic Hotspot Detection.
CoRR, 2019

2018
Mind the Gap: Insights into Student Perceptions During Peer Assessment of Writing.
Proceedings of the IEEE International Conference on Teaching, 2018

2017
An Automated Security-Aware Approach for Design of Embedded Systems on MPSoC.
ACM Trans. Embed. Comput. Syst., 2017

Towards decentralized system-level security for MPSoC-based embedded applications.
J. Syst. Archit., 2017

2016
A system-level security approach for heterogeneous MPSoCs.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016


  Loading...