Bertrand Granado

Orcid: 0000-0002-9667-9737

According to our database1, Bertrand Granado authored at least 80 papers between 1996 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
An Empirical Study of Convolutional Neural Network Compressions within Low-Power Devices.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
Color Pixel Reconstruction for a Monolithic RGB-Z CMOS Imager.
J. Signal Process. Syst., 2022

Accurate Estimation of the CNN Inference Cost for TinyML Devices.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

An efficient FPGA overlay for MPI-2 RMA parallel applications.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Low Complexity Shallow Neural Network With Improved False Negative Rate for Cyber Intrusion Detection Systems.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Harmonic Decomposition to Estimate Periodic Signals using Machine Learning Algorithms: Application to Helicopter Loads.
Proceedings of the International Joint Conference on Neural Networks, 2022

Comparative Study of Scheduling a Convolutional Neural Network on Multicore MCU.
Proceedings of the Design and Architecture for Signal and Image Processing, 2022

2021
CNN Inference Costs Estimation on Microcontrollers: the EST Primitive-based Model.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

Hand Crafted Method: ROI Selection and Texture Description.
Proceedings of the Computer-Aided Analysis of Gastrointestinal Videos, 2021

2020
Joint Sparse Learning With Nonlocal and Local Image Priors for Image Error Concealment.
IEEE Trans. Circuits Syst. Video Technol., 2020

Erratum to "A Low Power and Real-Time Architecture for Hough Transform Processing Integration in a Full HD-Wireless Capsule Endoscopy".
IEEE Trans. Biomed. Circuits Syst., 2020

A Low Power and Real-Time Architecture for Hough Transform Processing Integration in a Full HD-Wireless Capsule Endoscopy.
IEEE Trans. Biomed. Circuits Syst., 2020

Semi-Gradient for Color Pixel Reconstruction in a RGBZ CMOS Sensor.
Proceedings of the 2020 IEEE Sensors, Rotterdam, The Netherlands, October 25-28, 2020, 2020

2019
Distilling the knowledge in CNN for WCE screening tool.
Proceedings of the 2019 Conference on Design and Architectures for Signal and Image Processing, 2019

A Real Time Hough Transform Architecture Useable inside a WCE.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

Polyp follow-Up in an Intelligent Wireless Capsule Endoscopy.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

2018
FPGA-based simultaneous multichannel audio processor for musical genre indexing applications in broadcast band.
J. Parallel Distributed Comput., 2018

FPGA-Based Real Time Embedded Hough Transform Architecture for Circles Detection.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018

2017
Sparse Recovery-Based Error Concealment.
IEEE Trans. Multim., 2017

Embedded real-time monitoring using SystemC in IMA network.
CoRR, 2017

Image error concealment based on joint sparse representation and non-local similarity.
Proceedings of the 2017 IEEE Global Conference on Signal and Information Processing, 2017

Polyps recognition using fuzzy trees.
Proceedings of the 2017 IEEE EMBS International Conference on Biomedical & Health Informatics, 2017

2016
Image error concealment using sparse representations over a trained dictionary.
Proceedings of the 2016 Picture Coding Symposium, 2016

Image compression using adaptive sparse representations over trained dictionaries.
Proceedings of the 18th IEEE International Workshop on Multimedia Signal Processing, 2016

Adaptive saliency-based compressive sensing image reconstruction.
Proceedings of the 2016 IEEE International Conference on Multimedia & Expo Workshops, 2016

2015
Un réseau sur puce RF reconfigurable dynamiquement pour les many-cœurs.
Tech. Sci. Informatiques, 2015

ARC 2014: Towards a Fast FPGA Implementation of a Heap-Based Priority Queue for Image Coding Using a Parallel Index-Aware Tree.
ACM Trans. Reconfigurable Technol. Syst., 2015

Toward a Sparse Self-Organizing Map for Neuromorphic Architectures.
ACM J. Emerg. Technol. Comput. Syst., 2015

A Dynamically Reconfigurable RF NoC for Many-Core.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

FPGA-based real-time MFCC extraction for automatic audio indexing on FM broadcast data.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

Relevance of impedance spectroscopy for the monitoring of implant-induced fibrosis: A preliminary study.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015

Smart Videocapsule for Early Diagnosis of Colorectal Cancer: Toward Embedded Image Analysis.
Proceedings of the Computational Intelligence in Digital and Network Designs and Applications, 2015

2014
Computer-Assisted Segmentation of Videocapsule Images Using Alpha-Divergence-Based Active Contour in the Framework of Intestinal Pathologies Detection.
Int. J. Biomed. Imaging, 2014

Toward embedded detection of polyps in WCE images for early diagnosis of colorectal cancer.
Int. J. Comput. Assist. Radiol. Surg., 2014

Context-aware resources placement for SRAM-based FPGA to minimize checkpoint/recovery overhead.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

An OFDMA based RF interconnect for massive multi-core processors.
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

Reliability assessment of backward error recovery for SRAM-based FPGAs.
Proceedings of the 9th International Design and Test Symposium, 2014

Fast SRAM-FPGA fault injection platform based on dynamic partial reconfiguration.
Proceedings of the 26th International Conference on Microelectronics, 2014

A power-efficient adaptive heapsort for fpga-based image coding application (abstract only).
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

A Hardware MPI Spawn for Distributed Multiprocessing Reconfigurable System on Chip (MP-RSoC).
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

Fast and Power Efficient Heapsort IP for Image Compression Application.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014


Accelerating Heap-Based Priority Queue in Image Coding Application Using Parallel Index-Aware Tree Access.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
A genetic algorithm for multi-objective optimisation in workflow scheduling with hard constraints.
Int. J. Metaheuristics, 2013

FPGA vs DSP: A throughput and power efficiency comparison for Hierarchical Enumerative Coding.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Hardware MPI-2 Functions for Multi-Processing Reconfigurable System on Chip.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

An efficient BER-based reliability method for SRAM-based FPGA.
Proceedings of the 8th International Design and Test Symposium, 2013

FPGA implementation of Hierarchical Enumerative Coding for locally stationary image source.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Towards real-time in situ polyp detection in WCE images using a boosting-based approach.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

Session 1: Vision and image processing architectures.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Design and analysis of an FPGA based encoder SoC for locally stationary image source.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Towards a multimodal wireless video capsule for detection of colonic polyps as prevention of colorectal cancer.
Proceedings of the 13th IEEE International Conference on BioInformatics and BioEngineering, 2013

2012
Towards a Mobile Implementation of Waaves for Certified Medical Image Compression in E-Health Applications.
Proceedings of the Wireless Mobile Communication and Healthcare, 2012

Endocom and Cyclope - Two Smart Biomedical Sensors for Cardio-Vascular Surgery and Gastro-Enterology.
Proceedings of the Wireless Mobile Communication and Healthcare, 2012

Embodied Computing: Self-adaptation in Bio-inspired Reconfigurable Architectures.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

Prototype of a radio-on-demand broadcast receiver with real time musical genre classification.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011
Dynamic Application Model for Scheduling with Uncertainty on Reconfigurable Architectures.
Int. J. Reconfigurable Comput., 2011

A prototype circuit for a smart 3D endoscopic videocapsule based on SVM and stereovision.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Task model and online operating system API for hardware tasks in OLLAF platform.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

A new approach to 3D form recognition within video capsule endoscopic.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
Prototype of Video Endoscopic Capsule With 3-D Imaging Capabilities.
IEEE Trans. Biomed. Circuits Syst., 2010

3-D object recognition based on SVM and stereo-vision: Application in endoscopic imaging.
Proceedings of the Second International Conference of Soft Computing and Pattern Recognition, 2010

Novel Approach for Modeling Very Dynamic and Flexible Real Time Applications.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010

Prediction performance method for dynamic task scheduling, case study: the OLLAF Architecture.
Proceedings of the 5th International Design and Test Workshop, 2010

VHDL-AMS model of RF-Interconnect System for Global On-Chip Communication.
Proceedings of the 2010 Forum on specification & Design Languages, 2010

2009
OveRSoC: A Framework for the Exploration of RTOS for RSoC Platforms.
Int. J. Reconfigurable Comput., 2009

Design and Architectures for Signal and Image Processing.
EURASIP J. Embed. Syst., 2009

A System for an Accurate 3D Reconstruction in Video Endoscopy Capsule.
EURASIP J. Embed. Syst., 2009

OLLAF: A Fine Grained Dynamically Reconfigurable Architecture for OS Support.
EURASIP J. Embed. Syst., 2009

2008
A Framework for the Exploration of RTOS Dedicated to the Management of Hardware Reconfigurable Resources.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

2006
An Integrated Digital Architecture for the Real-time Reconstruction in a VSiP Sensor.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2004
A VHDL-AMS Configuration for Active Pixel Sensors.
Proceedings of the Forum on specification and Design Languages, 2004

2003
Fast triggering in high-energy physics experiments using hardware neural networks.
IEEE Trans. Neural Networks, 2003

Architecture of an intelligent beacon for wireless sensor networks.
Proceedings of the NNSP 2003, 2003

2002
Hardware solutions for implementation of neural networks in High Energy Physics triggers.
Proceedings of the 10th Eurorean Symposium on Artificial Neural Networks, 2002

2001
Combining signal processing and machine learning techniques for real time measurement of raindrops.
IEEE Trans. Instrum. Meas., 2001

Maharadja: A System for the Real Time Simulation of RBF with the Mahalanobis Distance.
Neural Process. Lett., 2001

1999
Can General Purpose Micro-processors Simulate Neural Networks in Real-Time?
Proceedings of the Engineering Applications of Bio-Inspired Artificial Neural Networks, 1999

1997
Evaluation of the CNAPS Neuro-Computer for the Simulation of MLPs with Receptive Fields.
Proceedings of the Biological and Artificial Computation: From Neuroscience to Technology, 1997

1996
Evaluation of the Two Different Interconnection Networks of the CNAPS Neurocomputer.
Proceedings of the Artificial Neural Networks, 1996


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