Bokyeon Won

According to our database, Bokyeon Won authored at least 6 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

An Offset Compensated Charge Transfer Pre-Sensing Bitline Sense Amplifier.

Kyeongtae Nam, Dongil Lee, Kyuchang Kang, Sangyun Kim, Changyoung Lee, Hyunchul Yoon, Donggeon Kim, Bokyeon Won, Jaejoon Song, Jaehyuk Kim, Incheol Nam, Young-Hun Seo, Jeong-Don Ihm, Changsik Yoo, Sangjoon Hwang

IEEE J. Solid State Circuits, April, 2025

A 16-Gb 37-Gb/s GDDR7 DRAM With PAM3-Optimized TRX Equalization and ZQ Calibration.

Sung-Yong Cho, Moon-Chul Choi, Jaehyeok Baek, Donggun An, Sang-Hoon Kim, Daewoong Lee, Seongyeal Yang, Se-Mi Kim, Gil-Young Kang, Juseop Park, Kyung-Ho Lee, Hwan-Chul Jung, Gun-hee Cho, Chan-Yong Lee, Hye-Ran Kim, Yong-Jae Shin, Hanna Park, Sang-Yong Lee, Jonghyuk Kim, Bokyeon Won, Jungil Mok, Kijin Kim, Unhak Lim, Hongjun Jin, YoungSeok Lee, Young-Tae Kim, Heonjoo Ha, Jinchan Ahn, Wonju Sung, Yoontaek Jang, Hoyoung Song, Hyodong Ban, TaeHoon Park, Changsik Yoo, Tae-Young Oh, SangJoon Hwang

IEEE J. Solid State Circuits, January, 2025

30.3 A 24Gb 42.5Gb/s GDDR7 DRAM with Low-Power WCK Distribution, an RC-Optimized Dual-Emphasis TX, and Voltage/Time-Margin-Enhanced Power Reduction.

Sang-Hoon Kim, Jaehyeok Baek, Moon-Chul Choi, Daewoong Lee, Donggun An, Se-Mi Kim, Yeonggeun Song, Minkyo Shim, Sung-Yong Cho, Dongha Lee, Gun-hee Cho, Inwoo Jun, Juseop Park, TaeYoon Lee, Hwan-Chul Jung, Chanyong Lee, Gil-Young Kang, Hye-Ran Kim, Jongmyung Lee, Young Su Joo, Hyo-Jin Jung, Bokyeon Won, Ji-Hak Yu, Sangkeun Han, Yechan Hwang, Chungman Kim, Seok-Jung Kim, YoungSeok Lee, Young-Tae Kim, Myeong-O. Kim, Wonhwa Shin, Tae-Young Oh, SangJoon Hwang

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024

An Offset-Compensated Charge-Transfer Pre-Sensing Bit-Line Sense-Amplifier for Low-Voltage DRAM.

Kyeongtae Nam, Jaehyuk Kim, Dongil Lee, Kyuchang Kang, Sangyun Kim, Changyoung Lee, Hyunchul Yoon, Donggeon Kim, Bokyeon Won, Jaejoon Song, Incheol Nam, Young-Hun Seo, Jeong-Don Ihm, Changsik Yoo, Sangjoon Hwang

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

13.6 A 16Gb 37Gb/s GDDR7 DRAM with PAM3-Optimized TRX Equalization and ZQ Calibration.

Sung-Yong Cho, Moon-Chul Choi, Jaehyeok Baek, Donggun An, Sanghoon Kim, Daewoong Lee, Seongyeal Yang, Gil-Young Kang, Juseop Park, Kyungho Lee, Hwan-Chul Jung, Gun-hee Cho, Chanyong Lee, Hye-Ran Kim, Yong-Jae Shin, Hanna Park, Sangyong Lee, Jonghyuk Kim, Bokyeon Won, Jungil Mok, Kijin Kim, Unhak Lim, Hongjun Jin, YoungSeok Lee, Young-Tae Kim, Heonjoo Ha, Jinchan Ahn, Wonju Sung, Yoontaek Jang, Hoyoung Song, Hyodong Ban, TaeHoon Park, Tae-Young Oh, Changsik Yoo, SangJoon Hwang

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

A Single-Ended Offset-Compensating Bit-Line Sense-Amplifier with Ground Precharge and Charge Transfer Pre sensing for Sub-1V DRAM.

Changyoung Lee, Youngseok Park, Hyunchul Yoon, Seryeong Yoon, Donggeon Kim, Bokyeon Won, Junhwa Song, In-Jae Bae, Jaejoon Song, Kyuchang Kang, Jaehyuk Kim, Kyungrak Cho, Incheol Nam, Jungdon Ihm, Young-Hun Seo, Changsik Yoo, Sang Jun Hwang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024