Daniele Paolo Scarpazza

According to our database1, Daniele Paolo Scarpazza authored at least 23 papers between 2003 and 2019.

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Bibliography

2019
Dissecting the Graphcore IPU Architecture via Microbenchmarking.
CoRR, 2019

Dissecting the NVidia Turing T4 GPU via Microbenchmarking.
CoRR, 2019

2018
Dissecting the NVIDIA Volta GPU Architecture via Microbenchmarking.
CoRR, 2018

2014

2013
Extending the Generality of Molecular Dynamics Simulations on a Special-Purpose Machine.
Proceedings of the 27th IEEE International Symposium on Parallel and Distributed Processing, 2013

2011
Top-Performance Tokenization and Small-Ruleset Regular Expression Matching - A Quantitative Performance Analysis and Optimization Study on the Cell/B.E. Processor.
Int. J. Parallel Program., 2011

Highly compressed multi-pattern string matching on the cell broadband engine.
Proceedings of the 16th IEEE Symposium on Computers and Communications, 2011

2010
Small-ruleset regular expression matching on GPGPUs: quantitative performance analysis and optimization.
Proceedings of the 24th International Conference on Supercomputing, 2010

2009
3D seismic imaging through reverse-time migration on homogeneous and heterogeneous multi-core processors.
Sci. Program., 2009

Workload characterization and optimization of high-performance text indexing on the Cell Broadband Engine.
Proceedings of the 2009 IEEE International Symposium on Workload Characterization, 2009

High-performance regular expression scanning on the Cell/B.E. processor.
Proceedings of the 23rd international conference on Supercomputing, 2009

2008
Efficient Breadth-First Search on the Cell/BE Processor.
IEEE Trans. Parallel Distributed Syst., 2008

Accelerating Real-Time String Searching with Multicore Processors.
Computer, 2008

High-speed string searching against large dictionaries on the Cell/B.E. Processor.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Exact multi-pattern string matching on the cell/b.e. processor.
Proceedings of the 5th Conference on Computing Frontiers, 2008

2007
Challenges in Mapping Graph Exploration Algorithms on Advanced Multi-core Processors.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Peak-Performance DFA-based String Matching on the Cell Processor.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Run-time Task Overlapping on Multiprocessor Platforms.
Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007

Transparent system-level migration of PGAS applications using Xen on InfiniBand.
Proceedings of the 2007 IEEE International Conference on Cluster Computing, 2007

2006
A source-level estimation and optimization methodology for execution time and energy consumption of embedded software.
PhD thesis, 2006

A Fast, Dynamic, Fine-Detail, Source Level Technique to Estimate the Energy Consumed by Embedded Software on Single-Issue Processor Cores.
J. Low Power Electron., 2006

Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level Parallelism.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

2003
Early estimation of the size of VHDL projects.
Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2003


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