Carlo Reita

According to our database1, Carlo Reita authored at least 8 papers between 1994 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A multi-core memristor chip for Stochastic Binary STDP.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A CMOL-Like Memristor-CMOS Neuromorphic Chip-Core Demonstrating Stochastic Binary STDP.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

2021
Overcoming the Data Deluge Challenges with Greener Electronics.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021


2020
Experimental Body-Input Three-Stage DC Offset Calibration Scheme for Memristive Crossbar.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
A Current Attenuator for Efficient Memristive Crossbars Read-Out.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Special session on quantum systems: Next challenges in design, test, integration.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

1994
Design, measurement and analysis of CMOS polysilicon TFT operational amplifiers.
IEEE J. Solid State Circuits, June, 1994


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