# Chandramouli Visweswariah

According to our database

Collaborative distances:

^{1}, Chandramouli Visweswariah authored at least 22 papers between 1988 and 2006.Collaborative distances:

## Timeline

#### Legend:

Book In proceedings Article PhD thesis Other## Links

#### On csauthors.net:

## Bibliography

2006

First-Order Incremental Block-Based Statistical Timing Analysis.

IEEE Trans. on CAD of Integrated Circuits and Systems, 2006

2005

Large-scale nonlinear optimization in circuit tuning.

Future Generation Comp. Syst., 2005

2004

First-order incremental block-based statistical timing analysis.

Proceedings of the 41th Design Automation Conference, 2004

Is statistical timing statistically significant?

Proceedings of the 41th Design Automation Conference, 2004

2003

Statistical timing for parametric yield prediction of digital integrated circuits.

Proceedings of the 40th Design Automation Conference, 2003

2002

Uncertainty-aware circuit optimization.

Proceedings of the 39th Design Automation Conference, 2002

2001

Overview of continuous optimization advances and applications to circuit tuning.

Proceedings of the 2001 International Symposium on Physical Design, 2001

2000

Noise considerations in circuit optimization.

IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

1999

Formulation of static circuit optimization with reduced size, degeneracy and redundancy by timing graph manipulation.

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Gradient-Based Optimization of Custom Circuits Using a Static-Timing Formulation.

Proceedings of the 36th Conference on Design Automation, 1999

1998

JiffyTune: circuit optimization using time-domain sensitivities.

IEEE Trans. on CAD of Integrated Circuits and Systems, 1998

Noise considerations in circuit optimization.

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

1997

Optimization techniques for high-performance digital circuits.

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

Circuit optimization via adjoint Lagrangians.

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

1996

Optimization of custom MOS circuits by transistor sizing.

ICCAD, 1996

Inaccuracies in power estimation during logic synthesis.

ICCAD, 1996

1993

Incremental Event-Driven Simulation of Digital FET Circuits.

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

M

^{3}-a multilevel mixed-mode mixed A/D simulator.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1992

1991

Efficient Simulation of Bipolar Digital ICs.

Proceedings of the 28th Design Automation Conference, 1991

1990

Incorporation of Inductors in Piecewise Approximate Circuit Simulation.

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1989

Piecewise approximate circuit simulation.

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1988

Model Development and Verification for High Level Analog Blocks.

Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988