Ralph H. J. M. Otten
According to our database1, Ralph H. J. M. Otten authored at least 28 papers between 1980 and 2008.
Legend:Book In proceedings Article PhD thesis Other
Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008
Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2006
Statistically Aware Buffer Planning.
Proceedings of the 2004 Design, 2004
Simultaneous Analytic Area and Power Optimization for Repeater Insertion.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Time Budgeting in a Wireplanning Context.
Proceedings of the 2003 Design, 2003
Shifts in INTEGRATION: 20 years of VLSI design.
Design Automation for Deepsubmicron: Present and Future.
Proceedings of the 2002 Design, 2002
Are wires plannable?
Proceedings of the Third IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2001), March 31, 2001
Technology mapping for area and speed.
What is a floorplan?.
Proceedings of the 2000 International Symposium on Physical Design, 2000
Challenges in Physical Chip Design.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000
Area and search space control for technology mapping.
Proceedings of the 37th Conference on Design Automation, 2000
Timing closure: the solution and its problems.
Proceedings of ASP-DAC 2000, 2000
A Novel VLSI Layout Fabric for Deep Sub-Micron Applications.
Proceedings of the 36th Conference on Design Automation, 1999
Global wires: harmful?.
Proceedings of the 1998 International Symposium on Physical Design, 1998
Constraints Space Management for the Layout of Analog IC's.
Proceedings of the 1998 Design, 1998
Planning for Performance.
Proceedings of the 35th Conference on Design Automation, 1998
Novel Simulation of Deep-Submicron MOSFET Circuits.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997
Embedded tutorial: Speed - new paradigms in design for performance.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996
An Automatic Hardware-Software Partitioner Based on the Possibilistic Programming.
Proceedings of the 1996 European Design and Test Conference, 1996
Retiming Synchronous Circuitry with Imprecise Delays.
Proceedings of the 32st Conference on Design Automation, 1995
Tackling cost optimization in testable design by forward inferencing.
Proceedings of the conference on European design automation, 1992
The complexity of adaptive annealing.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990
Optimal slicing of plane point placements.
Proceedings of the European Design Automation Conference, 1990
Conflict-free channel definition in building-block layout.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1989
Automatic floorplan design.
Proceedings of the 19th Design Automation Conference, 1982
The genealogical approach to the layout problem.
Proceedings of the 17th Design Automation Conference, 1980